Datasheet

DAC124S085
www.ti.com SNAS348F –MAY 2006–REVISED MARCH 2013
Typical Performance Characteristics (continued)
V
REF
= V
A
, f
SCLK
= 30 MHz, T
A
= 25C, Input Code Range 48 to 4047, unless otherwise stated
5V Glitch Response Power-On Reset
Figure 27. Figure 28.
Functional Description
DAC SECTION
The DAC124S085 is fabricated on a CMOS process with an architecture that consists of switches and resistor
strings that are followed by an output buffer. The reference voltage is externally applied at V
REFIN
and is shared
by all four DACs.
For simplicity, a single resistor string is shown in Figure 29. This string consists of 4096 equal valued resistors
with a switch at each junction of two resistors, plus a switch to ground. The code loaded into the DAC register
determines which switch is closed, connecting the proper node to the amplifier. The input coding is straight
binary with an ideal output voltage of:
V
OUTA,B,C,D
= V
REFIN
x (D / 4096
where
• D is the decimal equivalent of the binary code that is loaded into the DAC register) (2)
D can take on any value between 0 and 4095. This configuration ensures that the DAC is monotonic.
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