Datasheet

1
2
3
4
5
6
7
8
DV
DD
X
OUT
X
IN
DGND
AV
DD
DNC
DNC
DNC
SCLK
SDIO
CS
AGND
V
REF
V
OUT
C
2
C
1
16
15
14
13
12
11
10
9
DAC1220
C
2
12pF
C
1
12pF
AV
DD
XTAL
V
OUT
V
REF
DV
DD
P1.1
P1.0
8051
Opto
Coupler
Opto
Coupler
Isolated
Power
C
2
C
1
= DGND
= AGND
= Isolated
DAC1220
www.ti.com ...................................................................................................................................... SBAS082G –FEBRUARY 1998–REVISED SEPTEMBER 2009
Isolation Full-Scale Range (FSR)—This is the magnitude of
the typical analog output voltage range, which is 2 ×
The DAC1220 serial interface allows for connection
V
REF
. For example, when the converter is configured
using as few as two wires. This is an advantage
with a 2.5V reference, the Full-Scale range is 5.0V.
when galvanic isolation is required. An example
isolated connection is shown in Figure 13. Here, Gain Error—This error represents the difference in
chip-select is unused and therefore grounded, and the slope between the actual and ideal transfer
the DAC1220 is being operated unidirectionally. functions.
Linearity Error—The deviation of the actual transfer
DAC1220 Revisions
function from an ideal straight line between the data
end points.
As of this writing, there have been two released
revisions of the DAC1220. The only difference
Least Significant Bit (LSB) Weight—This is the
between the two versions is bit 13 of the Command
ideal change in voltage that the analog output
Register. In the first revision, this bit was writable,
changes with a change in the digital input code of
and defaulted to '0'. In the current revision, which was
1LSB.
released in 1999, this bit is fixed at '1', and is not
writable. Monotonicity—Monotonicity assures that the analog
output will increase or stay the same for increasing
For first revision chips, always write a '1' to this bit.
digital input codes.
Although the bit is not critical, performance is not
optimal unless this bit is set. Offset Error—The difference between the expected
and actual output, when the output is zero. The value
This does no harm in current revision chips, and
is calculated from measurements made when V
OUT
=
ensures that first revision chips perform optimally.
20mV.
Settling Time—The time it takes the output to settle
Definition of Terms
to a new value after the digital code has been
Differential Nonlinearity Error—The difference
changed.
between an actual step width and the ideal value of
f
XIN
—The frequency of the crystal oscillator or
1LSB. If the step width is exactly 1LSB, the
CMOS-compatible input signal at the X
IN
input of the
differential nonlinearity error is zero. A differential
DAC1220.
nonlinearity specification of less than 1LSB ensures
monotonicity.
Drift—The change in a parameter over temperature.
Figure 13. Isolation for Two-Wire Interface
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