Datasheet

DAC1220
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...................................................................................................................................... SBAS082G FEBRUARY 1998REVISED SEPTEMBER 2009
Startup Sequence Since the calibration functions are linear, calibration
results can be averaged for greater precision. For
At startup, the following procedure should generally
example, it may be beneficial to perform several
be followed to properly initialize the DAC1220:
self-calibrations in succession, record the result of
1. If the DAC1220 is being clocked from a crystal,
each, average them together, and store the averages
wait for the oscillator to start—at least
in the OCR and FCR.
25ms—before attempting to communicate with it.
Trying to communicate with the DAC1220 before
Self-Calibration Procedure
the crystal oscillator has reached its final
To perform a self-calibration, place the DAC1220 into
frequency will usually result in corrupt
Self Calibration mode by setting the MD1 bit to '0'
communication.
and the MD0 bit to '1' in the Command Register. At a
2. Optionally apply the SCLK reset pattern. This
clock frequency of 2.5MHz, self-calibration takes
should also only be done once the oscillator is
between 300ms and 500ms; the actual time is
started, since the pattern is detected using
indeterminate and depends on the results.
oscillator cycles. Applying the reset pattern at
power-up ensures that the DAC1220 is reset
If the CALPIN bit in the Command Register is '1', the
properly, and not lingering in an unknown state in
output remains connected during calibration. The
case of POR failure, brownout, etc.
DAC voltage will change during the calibration
After a successful reset, the DAC1220 enters
process. This can be important if the DAC output is
Normal mode.
loaded significantly; disconnecting the output during
calibration places a high load impedance on the
3. Set up the Command Register as desired. This
output amplifier, which may be different from normal
may include changing the mode from Sleep to
operation.
Self Calibration or Normal.
4. Calibrate the DAC1220. Although this step is
If the CALPIN bit in the Command Register is '0', the
optional, the DAC1220 should almost always be
output will be disconnected during calibration. If this
calibrated. It is permissible to run calibration
is the case, when calibration begins, the DAC1220
every time, or to use values from a previous
briefly charges the C
2
capacitor to the current output
calibration. See the Calibration section for details.
voltage. If the output is buffered, C
2
effectively
becomes a sample-and-hold capacitor, so that the
After calibration, the DAC1220 returns to Normal
final output voltage remains during calibration.
mode. The DAC1220 is ready to accept data once it
is in Normal mode, but calibration or the use of saved
When the calibration is complete, the DAC1220
calibration values is highly recommended.
switches to Normal mode. If the output was
disconnected, it is reconnected at that time. The end
Calibration of the calibration procedure can be detected by
polling the MD1 and MD0 bits. When they become 0,
Calibration is governed by two registers. The Offset
the calibration is complete.
Calibration Register (OCR) stores a value
determining the offset calibration, and the Full-Scale If readback is not being performed, simply wait at
Calibration Register (FCR) stores a value determining least 500ms before sending further commands to the
the gain calibration. device, assuming that the clock frequency is 2.5MHz.
The value in the OCR is scaled and additive. It has a Once calibration is complete, the OCR and FCR
linear relationship to the generated offset calibration contain the results of the calibration, and the new
voltage. The value in the FCR is scaled and constants are effective immediately.
multiplicative. It has a linear relationship to the
generated gain calibration multiplier.
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