Datasheet

t
14
t
9
IN7IN0IN1INMIN1 IN0IN7
Write Register Data
IN7OUT0OUT1OUTMIN1 IN0IN7
Read Register Data
SCLK
SDIO
SDIO
CS
SCLK
SDIO
t
15
t
10
IN7IN0IN1IN0IN1IN7 INM
t
10
t
9
Write Register Data
SDIO
IN7OUT0OUT1IN0IN1IN7 OUTM
Read Register Data
OUT MSB OUT0
t
12
t
10
t
9
SDIO is an input SDIO is an output
IN7
t
13
t
11
IN0
CS
SCLK
SDIO
DAC1220
SBAS082G –FEBRUARY 1998–REVISED SEPTEMBER 2009...................................................................................................................................... www.ti.com
Figure 9. Serial Interface Timing (CS Low)
Figure 10. Serial Interface Timing (Using CS)
Figure 11. SDIO Input to Output Transition Timing
Table 4. Serial Interface Timing Characteristics
SYMBOL DESCRIPTION MIN NOM MAX UNITS
Falling edge of last SCLK for command to
t
9
13 × t
XIN
ns
rising edge of first SCLK for register data
t
10
Falling edge of CS to rising edge of SCLK 11 × t
XIN
ns
Falling edge of last SCLK for command to SDIO as
t
11
8 × t
XIN
10 × t
XIN
ns
output
SDIO as output to rising edge of first SCLK
t
12
4 × t
XIN
ns
for register data
Falling edge of last SCLK for register data to SDIO
t
13
4 × t
XIN
6 × t
XIN
ns
tri-state
Falling edge of last SCLK for register data to
t
14
rising edge of first SCLK of next command (CS tied 41 × t
XIN
ns
low)
t
15
Rising edge of CS to falling edge of CS (using CS) 22 × t
XIN
ns
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