Datasheet

DAC121S101
SNAS265I –JUNE 2005–REVISED MARCH 2013 www.ti.com
A.C. and Timing Characteristics
The following specifications apply for V
A
= +2.7V to +5.5V, R
L
= 2kΩ to GND, C
L
= 200 pF to GND, f
SCLK
= 30 MHz, input
code range 48 to 4047. Boldface limits apply for T
MIN
≤ T
A
≤ T
MAX
: all other limits T
A
= 25°C, unless otherwise specified.
Units
Symbol Parameter Conductions Typical Limits
(Limits)
f
SCLK
SCLK Frequency 30 MHz (max)
C
L
≤ 200 pF 8 10 µs (max)
400h to C00h code
change, R
L
= 2kΩ
C
L
= 500 pF 12 µs
t
s
Output Voltage Settling Time
(1)
C
L
≤ 200 pF 8 µs
00Fh to FF0h code
change, R
L
= 2kΩ
C
L
= 500 pF 12 µs
SR Output Slew Rate 1 V/µs
Glitch Impulse Code change from 800h to 7FFh 12 nV-sec
Digital Feedthrough 0.5 nV-sec
V
A
= 5V 6 µs
t
WU
Wake-Up Time
V
A
= 3V 39 µs
1/f
SCLK
SCLK Cycle Time 33 ns (min)
t
H
SCLK High time 5 13 ns (min)
t
L
SCLK Low Time 5 13 ns (min)
Set-up Time SYNC to SCLK Rising
t
SUCL
−15 0 ns (min)
Edge
t
SUD
Data Set-Up Time 2.5 5 ns (min)
t
DHD
Data Hold Time 2.5 4.5 ns (min)
V
A
= 5V 0 3 ns (min)
t
CS
SCLK fall to rise of SYNC
V
A
= 3V −2 1 ns (min)
2.7 ≤ V
A
≤ 3.6 9 20 ns (min)
t
SYNC
SYNC High Time
3.6 ≤ V
A
≤ 5.5 5 10 ns (min)
(1) This parameter is guaranteed by design and/or characterization and is not tested in production.
Specification Definitions
DIFFERENTIAL NON-LINEARITY (DNL) is the measure of the maximum deviation from the ideal step size of 1
LSB, which is V
REF
/ 4096 = V
A
/ 4096.
DIGITAL FEEDTHROUGH is a measure of the energy injected into the analog output of the DAC from the digital
inputs when the DAC outputs are not updated. It is measured with a full-scale code change on the data bus.
FULL-SCALE ERROR is the difference between the actual output voltage with a full scale code (FFFh) loaded
into the DAC and the value of V
A
x 4095 / 4096.
GAIN ERROR is the deviation from the ideal slope of the transfer function. It can be calculated from Zero and
Full-Scale Errors as GE = FSE - ZE, where GE is Gain error, FSE is Full-Scale Error and ZE is Zero Error.
GLITCH IMPULSE is the energy injected into the analog output when the input code to the DAC register
changes. It is specified as the area of the glitch in nanovolt-seconds.
INTEGRAL NON-LINEARITY (INL) is a measure of the deviation of each individual code from a straight line
through the input to output transfer function. The deviation of any given code from this straight line is measured
from the center of that code value. The end point method is used. INL for this product is specified over a limited
range, per the Electrical Characteristics.
LEAST SIGNIFICANT BIT (LSB) is the bit that has the smallest value or weight of all bits in a word. This value is
LSB = V
REF
/ 2
n
(1)
where V
REF
is the supply voltage for this product, and "n" is the DAC resolution in bits, which is 12 for the
DAC121S101.
MAXIMUM LOAD CAPACITANCE is the maximum capacitance that can be driven by the DAC with output
stability maintained.
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