Datasheet

DAC121S101
SNAS265I –JUNE 2005–REVISED MARCH 2013 www.ti.com
Typical Performance Characteristics (continued)
f
SCLK
= 30 MHz, T
A
= 25C, Input Code Range 48 to 4047, unless otherwise stated
3V Wake-Up Time 5V Wake-Up Time
Figure 33. Figure 34.
FUNCTIONAL DESCRIPTION
DAC SECTION
The DAC121S101 is fabricated on a CMOS process with an architecture that consists of switches and a resistor
string that are followed by an output buffer. The power supply serves as the reference voltage. The input coding
is straight binary with an ideal output voltage of:
V
OUT
= V
A
x (D / 4096) (2)
where D is the decimal equivalent of the binary code that is loaded into the DAC register and can take on any
value between 0 and 4095.
RESISTOR STRING
The resistor string is shown in Figure 35. This string consists of 4096 equal valued resistors with a switch at each
junction of two resistors, plus a switch to ground. The code loaded into the DAC register determines which switch
is closed, connecting the proper node to the amplifier. This configuration guarantees that the DAC is monotonic.
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