Datasheet

DAC121C081, DAC121C085
www.ti.com SNAS395D –DECEMBER 2007–REVISED MARCH 2013
A.C. and Timing Characteristics (continued)
Values shown in this table are design targets and are subject to change before product release.
The following specifications apply for V
A
= +2.7V to +5.5V, V
REF
= V
A
, R
L
= Infinity, C
L
= 200 pF to GND. Boldface limits
apply for T
MIN
≤ T
A
≤ T
MAX
and all other limits are at T
A
= 25°C, unless otherwise specified.
Units
Symbol Parameter Conditions
(1)
Typical
(2)
Limits
(1)(2)
(Limits)
Standard Mode 300 ns (max)
20+0.1C
b
ns (min)
Fast Mode
300 ns (max)
t
fCL
Fall time of a SCL signal
10 ns (min)
High Speed Mode, C
b
= 100pF
40 ns (max)
20 ns (min)
High Speed Mode, C
b
= 400pF
80 ns (max)
Capacitive load for each bus line (SCL
C
b
400 pF (max)
and SDA)
Fast Mode 50 ns (max)
t
SP
Pulse Width of spike suppressed
(5)(6)
High Speed Mode 10 ns (max)
SDA output delay (see the
Fast Mode 87 270 ns (max)
t
outz
ADDITIONAL TIMING INFORMATION:
High Speed Mode 38 60 ns (max)
toutz section)
(5) Spike suppression filtering on SCL and SDA will supress spikes that are less than 50ns for standard-fast mode and less than 10ns for
hs-mode.
(6) This parameter is specified by design and/or characterization and is not tested in production.
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