Datasheet

DAC108S085
SNAS423B –AUGUST 2007–REVISED MARCH 2013 www.ti.com
accomplish this task in the minimum number of write frames, the user would alter the control register values of all
the DAC channels except channel A while operating in WRM. The last write frame would be used to exercise the
special command "Channel A Write Mode". In addition to updating channel A's control register and output to a
new value, all of the other channels would be updated as well. At the end of this sequence of write frames, the
DAC108S085 would still be operating in WRM (see Table 3).
The third special command allows the user to set all the DAC control registers and outputs to the same level.
This command is commonly referred to as "broadcast" mode since the same data bits are being broadcast to all
of the channels simultaneously. This command is exercised by setting data bits DB[15:12] to "1100" and data bits
DB[11:0] to the value that the user wishes to broadcast to all the DAC control registers. Once the command is
exercised, each DAC output is updated by the new control register value. This command is frequently used to set
all the DAC outputs to some known voltage such as 0V, V
REF
/2, or Full Scale. A summary of the commands can
be found in Table 3.
Table 3. Special Command Operations
DB[15:12] DB[11:0] Description of Mode
Update Select: The DAC outputs of the channels selected with a "1" in
1 0 1 0 X X X X H G F E D C B A DB[7:0] are updated simultaneously to the values in their respective control
registers.
Channel A Write: Channel A's control register and DAC output are updated to
1 0 1 1 D11 D10 ... D3 D2 X X the data in DB[11:0]. The outputs of the other seven channels are also
updated according to their respective control register values.
Broadcast: The data in DB[11:0] is written to all channels' control register and
1 1 0 0 D11 D10 ... D3 D2 X X
DAC output simultaneously.
POWER-ON RESET
The power-on reset circuit controls the output voltages of the eight DACs during power-up. Upon application of
power, the DAC registers are filled with zeros and the output voltages are set to 0V. The outputs remain at 0V
until a valid write sequence is made.
POWER-DOWN MODES
The DAC108S085 has three power-down modes where different output terminations can be selected (see
Table 4). With all channels powered down, the supply current drops to 0.1 µA at 3V and 0.2 µA at 5V. By
selecting the channels to be powered down in DB[7:0] with a "1", individual channels can be powered down
separately or multiple channels can be powered down simultaneously. The three different output terminations
include high output impedance, 100k ohm to ground, and 2.5k ohm to ground.
The output amplifiers, resistor strings, and other linear circuitry are all shut down in any of the power-down
modes. The bias generator, however, is only shut down if all the channels are placed in power-down mode. The
contents of the DAC registers are unaffected when in power-down. Therefore, each DAC register maintains its
value prior to the DAC108S085 being powered down unless it is changed during the write sequence which
instructed it to recover from power down. Minimum power consumption is achieved in the power-down mode with
SYNC idled high, D
IN
idled low, and SCLK disabled. The time to exit power-down (Wake-Up Time) is typically 3
µsec at 3V and 20 µsec at 5V.
Table 4. Power-Down Modes
DB[15:12] DB[11:8] 7 6 5 4 3 2 1 0 Output Impedance
1 1 0 1 X X X X H G F E D C B A High-Z outputs
1 1 1 0 X X X X H G F E D C B A 100 kΩ outputs
1 1 1 1 X X X X H G F E D C B A 2.5 kΩ outputs
Applications Information
EXAMPLES PROGRAMMING THE DAC108S085
This section will present the step-by-step instructions for programming the serial input register.
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