Datasheet

DAC101S101, DAC101S101-Q1
www.ti.com
SNAS321F JUNE 2005REVISED MARCH 2013
Electrical Characteristics (continued)
The following specifications apply for V
A
= +2.7V to +5.5V, R
L
= 2k to GND, C
L
= 200 pF to GND, f
SCLK
= 30 MHz, input
code range 12 to 1011. Boldface limits apply for T
MIN
T
A
T
MAX
: all other limits T
A
= 25°C, unless otherwise specified.
Typical Limits Units
Symbol Parameter Conditions
(1) (1)
(Limits)
V
A
= 5V 2.4 V (min)
V
IH
Input High Voltage
(2)
V
A
= 3V 2.1 V (min)
C
IN
Input Capacitance
(2)
3 pF (max)
POWER REQUIREMENTS
V
A
= 5.5V 256 332 µA (max)
Normal Mode
f
SCLK
= 30 MHz
V
A
= 3.6V 174 226 µA (max)
V
A
= 5.5V 221 297 µA (max)
Normal Mode
f
SCLK
= 20 MHz
V
A
= 3.6V 154 207 µA (max)
V
A
= 5.5V 145 µA (max)
Normal Mode
f
SCLK
= 0
V
A
= 3.6V 113 µA (max)
I
A
Supply Current (output unloaded)
V
A
= 5.0V 83 µA (max)
All PD Modes,
f
SCLK
= 30 MHz
V
A
= 3.0V 42 µA (max)
V
A
= 5.0V 56 µA (max)
All PD Modes,
f
SCLK
= 20 MHz
V
A
= 3.0V 28 µA (max)
V
A
= 5.5V 0.06 1.0 µA (max)
All PD Modes,
f
SCLK
= 0
(2)
V
A
= 3.6V 0.04 1.0 µA (max)
V
A
= 5.5V 1.41 1.83 mW (max)
Normal Mode
f
SCLK
= 30 MHz
V
A
= 3.6V 0.63 0.81 mW (max)
V
A
= 5.5V 1.22 1.63 mW (max)
Normal Mode
f
SCLK
= 20 MHz
V
A
= 3.6V 0.55 0.74 mW (max)
V
A
= 5.5V 0.80 µW (max)
Normal Mode
f
SCLK
= 0
V
A
= 3.6V 0.41 µW (max)
Power Consumption (output
P
C
unloaded)
V
A
= 5.0V 0.42 µW (max)
All PD Modes,
f
SCLK
= 30 MHz
V
A
= 3.0V 0.13 µW (max)
V
A
= 5.0V 0.28 µW (max)
All PD Modes,
f
SCLK
= 20 MHz
V
A
= 3.0V 0.08 µW (max)
V
A
= 5.5V 0.33 5.5 µW (max)
All PD Modes,
f
SCLK
= 0
(3)
V
A
= 3.6V 0.14 3.6 µW (max)
V
A
= 5V 91 %
I
OUT
/ I
A
Power Efficiency I
LOAD
= 2mA
V
A
= 3V 94 %
(3) This parameter is ensured by design and/or characterization and is not tested in production.
A.C. and Timing Characteristics
The following specifications apply for V
A
= +2.7V to +5.5V, R
L
= 2k to GND, C
L
= 200 pF to GND, f
SCLK
= 30 MHz, input
code range 12 to 1011. Boldface limits apply for T
MIN
T
A
T
MAX
: all other limits T
A
= 25°C, unless otherwise specified.
Units
Symbol Parameter Conductions Typical Limits
(Limits)
f
SCLK
SCLK Frequency 30 MHz (max)
Output Voltage Settling Time 100h to 300h code
t
s
C
L
200 pF 5 7.5 µs (max)
(1)
change, R
L
= 2k
SR Output Slew Rate 1 V/µs
Glitch Impulse Code change from 200h to 1FFh 12 nV-sec
Digital Feedthrough 0.5 nV-sec
(1) This parameter is ensured by design and/or characterization and is not tested in production.
Copyright © 2005–2013, Texas Instruments Incorporated Submit Documentation Feedback 5
Product Folder Links: DAC101S101 DAC101S101-Q1