Datasheet

DAC101C081, DAC101C081Q, DAC101C085
SNVS801A –APRIL 2012–REVISED MARCH 2013 www.ti.com
AC and Timing Characteristics
The following specifications apply for V
A
= +2.7V to +5.5V, V
REF
= V
A
, R
L
= Infinity, C
L
= 200 pF to GND. Boldface limits
apply for T
MIN
≤ T
A
≤ T
MAX
and all other limits are at T
A
= 25°C, unless otherwise specified.
Units
Symbol Parameter Test Conditions
(1)
Typ
(2)
Limits
(1)(2)
(Limits)
100h to 300h code change
t
s
Output Voltage Settling Time
(3)
4.5 6 µs (max)
R
L
= 2kΩ, C
L
= 200 pF
SR Output Slew Rate 1 V/µs
Glitch Impulse Code change from 200h to 1FFh 12 nV-sec
Digital Feedthrough 0.5 nV-sec
Multiplying Bandwidth
(4)
V
REF
= 2.5V ± 0.1Vpp 160 kHz
V
REF
= 2.5V ± 0.1Vpp
Total Harmonic Distortion
(4)
70 dB
input frequency = 10kHz
V
A
= 3V 0.8 µsec
t
WU
Wake-Up Time
V
A
= 5V 0.5 µsec
DIGITAL TIMING SPECS (SCL, SDA)
Standard Mode 100 kHz (max)
Fast Mode 400 kHz (max)
f
SCL
Serial Clock Frequency
High Speed Mode, C
b
= 100pF 3.4 MHz (max)
High Speed Mode, C
b
= 400pF 1.7 MHz (max)
Standard Mode 4.7 µs (min)
Fast Mode 1.3 µs (min)
t
LOW
SCL Low Time
High Speed Mode, C
b
= 100pF 160 ns (min)
High Speed Mode, C
b
= 400pF 320 ns (min)
Standard Mode 4.0 µs (min)
Fast Mode 0.6 µs (min)
t
HIGH
SCL High Time
High Speed Mode, C
b
= 100pF 60 ns (min)
High Speed Mode, C
b
= 400pF 120 ns (min)
Standard Mode 250 ns (min)
t
SU;DAT
Data Setup Time Fast Mode 100 ns (min)
High Speed Mode 10 ns (min)
0 µs (min)
Standard Mode
3.45 µs (max)
0 µs (min)
Fast Mode
0.9 µs (max)
t
HD;DAT
Data Hold Time
0 ns (min)
High Speed Mode, C
b
= 100pF
70 ns (max)
0 ns (min)
High Speed Mode, C
b
= 400pF
150 ns (max)
Standard Mode 4.7 µs (min)
Setup time for a start or a repeated
t
SU;STA
Fast Mode 0.6 µs (min)
start condition
High Speed Mode 160 ns (min)
Standard Mode 4.0 µs (min)
Hold time for a start or a repeated start
t
HD;STA
Fast Mode 0.6 µs (min)
condition
High Speed Mode 160 ns (min)
Bus free time between a stop and start Standard Mode 4.7 µs (min)
t
BUF
condition Fast Mode 1.3 µs (min)
Standard Mode 4.0 µs (min)
t
SU;STO
Setup time for a stop condition Fast Mode 0.6 µs (min)
High Speed Mode 160 ns (min)
(1) C
b
refers to the capacitance of one bus line. C
b
is expressed in pF units.
(2) Typical figures are at T
J
= 25°C, and represent most likely parametric norms. Test limits are specified to AOQL (Average Outgoing
Quality Level).
(3) This parameter is ensured by design and/or characterization and is not tested in production.
(4) Applies to the Multiplying DAC configuration. In this configuration, the reference is used as the analog input. The value loaded in the
DAC Register will digitally attenuate the signal at Vout.
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