Datasheet

DAC101C081/5
PController
SDA
SCL
SDA
SCL
0.1 PF
V
A
4.7 PF
R
P
R
P
ADC101C021
SDA
SCL
Regulated Supply
I
2
C Device
SDA
SCL
R
S
*
*NOTE: R
S
is optional.
R
S
*
V
DD
V
REF
10 PF
DAC101C081, DAC101C081Q, DAC101C085
SNVS801A APRIL 2012REVISED MARCH 2013
www.ti.com
Figure 35. Serial Interface Connection Diagram
Interfacing to a Hs-mode Bus
Interfacing to a Hs-mode bus is very similar to interfacing to a Standard-Fast mode bus. In Hs-mode, the
specified rise time of SCL is shortened. To create a faster rise time, the master device (microcontroller) can drive
the SCL bus high and low. In other words, the microcontroller can drive the line high rather than leaving it to the
pull-up resistor. It is also possible to decrease the value of the pull-up resistors or increase the pull-up current to
meet the tighter timing specs. Please refer to the I
2
C™ Specification for further details.
LAYOUT, GROUNDING, AND BYPASSING
For best accuracy and minimum noise, the printed circuit board containing the DAC101C081 should have
separate analog and digital areas. The areas are defined by the locations of the analog and digital power planes.
Both of these planes should be located on the same board layer. There should be a single ground plane. A
single ground plane is preferred if digital return current does not flow through the analog ground area. Frequently
a single ground plane design will utilize a "fencing" technique to prevent the mixing of analog and digital ground
current. Separate ground planes should only be utilized when the fencing technique is inadequate. The separate
ground planes must be connected in one place, preferably near the DAC101C081. Special care is required to
ensure that digital signals with fast edge rates do not pass over split ground planes. They must always have a
continuous return path below their traces.
The DAC101C081 power supply should be bypassed with a 4.7µF and a 0.1µF capacitor as close as possible to
the device with the 0.1µF right at the device supply pin. The 4.7µF capacitor should be a tantalum type and the
0.1µF capacitor should be a low ESL, low ESR type. The power supply for the DAC101C081 should only be
used for analog circuits.
Avoid crossover of analog and digital signals and keep the clock and data lines on the component side of the
board. These clock and data lines should have controlled impedances.
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Product Folder Links: DAC101C081 DAC101C081Q DAC101C085