Datasheet

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DAC101C081, DAC101C081Q, DAC101C085

www.ti.com

SNVS801A –APRIL 2012–REVISED MARCH 2013

DAC101C081/DAC101C081Q/DAC101C085 10-Bit Micro Power Digital-to-Analog Converter

with an I

C™-Compatible Interface

Check for Samples: DAC101C081, DAC101C081Q, DAC101C085

FEATURES

DESCRIPTION

The DAC101C081 is a 10-bit, single channel, voltage-

• Ensured Monotonicity to 10-bits

output digital-to-analog converter (DAC) that operates

• Low Power Operation: 156 µA max @ 3.3V

from a +2.7V to 5.5V supply. The output amplifier

• Extended Power Supply Range (+2.7V to

allows rail-to-rail output swing and has an 6µsec

+5.5V)

settling time. The DAC101C081 uses the supply

voltage as the reference to provide the widest

• I

C-Compatible 2-Wire Interface which

dynamic output range and typically consumes 132µA

Supports Standard (100kHz), Fast (400kHz),

while operating at 5.0V. It is available in 6-lead SOT

and High Speed (3.4MHz) Modes

and WSON packages and provides three address

• Rail-to-Rail Voltage Output

options (pin selectable).

• Very Small Package

As an alternative, the DAC101C085 provides nine

• DAC101C081Q is AEC Q100 Grade 1 Qualified

C™ addressing options and uses an external

and Manufactured on Automotive Grade Flow

reference. It has the same performance and settling

time as the DAC101C081. It is available in an 8-lead

VSSOP.

KEY SPECIFICATIONS

The DAC101C081 and DAC101C085 use a 2-wire,

• Resolution: 10 bits

C™-compatible serial interface that operates in all

• INL: ±2 LSB (max)

three speed modes, including high speed mode

• DNL: +0.3/-0.2 LSB (max)

(3.4MHz). An external address selection pin allows up

• Setting Time: 6 µs (max)

to three DAC101C081 or nine DAC101C085 devices

per 2-wire bus. Pin compatible alternatives to the

• Zero Code Error: +10 mV (max)

DAC101C081 are available that provide additional

• Full-Scale Error: −0.7 %FS (max)

address options.

• Supply Power (Normal): 380 µW (3V) / 730 µW

The DAC101C081 and DAC101C085 each have a

(5V) typ

16-bit register that controls the mode of operation, the

• Supply Power (Power Down): 0.5 µW (3V) / 0.9

power-down condition, and the output voltage. A

µW (5V) typ

power-on reset circuit ensures that the DAC output

powers up to zero volts. A power-down feature

reduces power consumption to less than a microWatt.

APPLICATIONS

Their low power consumption and small packages

• Industrial Process Control

make these DACs an excellent choice for use in

• Portable Instruments

battery operated equipment. Each DAC operates over

the extended industrial temperature range of −40°C

• Digital Gain and Offset Adjustment

to +125°C.

• Programmable Voltage & Current Sources

The DAC101C081 and DAC101C085 are each part of

• Test Equipment

a family of pin compatible DACs that also provide 12

• Automotive

and 8 bit resolution. For 12-bit DACs see the

DAC121C081 and DAC121C085. For 8-bit DACs see

the DAC081C081 and DAC081C085.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

C is a trademark of NXP Semiconductors.

3All other trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (36 pages)

PAGE 1
DAC101C081, DAC101C081Q, DAC101C085 www.ti.com SNVS801A – APRIL 2012 – REVISED MARCH 2013 DAC101C081/DAC101C081Q/DAC101C085 10-Bit Micro Power Digital-to-Analog Converter with an I2C™-Compatible Interface Check for Samples: DAC101C081, DAC101C081Q, DAC101C085 FEATURES DESCRIPTION • • • The DAC101C081 is a 10-bit, single channel, voltageoutput digital-to-analog converter (DAC) that operates from a +2.7V to 5.5V supply.
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DAC101C081, DAC101C081Q, DAC101C085 SNVS801A – APRIL 2012 – REVISED MARCH 2013 www.ti.com Table 1. Pin-Compatible Alternatives (1) (1) Resolution SOT-6 and WSON-6 Packages VSSOP-8 Package w/ External Reference 12-bit DAC121C081 DAC121C085 10-bit DAC101C081 DAC101C085 8-bit DAC081C081 DAC081C085 All devices are fully pin and function compatible.
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DAC101C081, DAC101C081Q, DAC101C085 www.ti.com SNVS801A – APRIL 2012 – REVISED MARCH 2013 PIN DESCRIPTIONS Symbol Type Equivalent Circuit VOUT Analog Output VA Supply Power supply input. For the SOT and WSON versions, this supply is used as the reference. Must be decoupled to GND. GND Ground Ground for all on-chip circuitry. SDA Digital Input/Output SCL Digital Input ADR0 Digital Input, three levels Analog Output Voltage. Serial Data bi-directional connection.
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DAC101C081, DAC101C081Q, DAC101C085 SNVS801A – APRIL 2012 – REVISED MARCH 2013 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Absolute Maximum Ratings (1) (2) (3) Supply Voltage, VA −0.3V to +6.5V Voltage on any Input Pin −0.3V to +6.
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DAC101C081, DAC101C081Q, DAC101C085 www.ti.com SNVS801A – APRIL 2012 – REVISED MARCH 2013 Operating Ratings (1) (2) −40°C ≤ TA ≤ +125°C Operating Temperature Range Supply Voltage, VA +2.7V to 5.5V Reference Voltage, VREFIN +1.0V to VA Digital Input Voltage (3) (4) 0.0V to 5.5V Output Load 0 to 1500 pF (1) (2) (3) (4) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur.
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DAC101C081, DAC101C081Q, DAC101C085 SNVS801A – APRIL 2012 – REVISED MARCH 2013 www.ti.com Electrical Characteristics The following specifications apply for VA = +2.7V to +5.5V, VREF = VA, CL = 200 pF to GND, input code range 12 to 1011. Boldface limits apply for TMIN ≤ TA ≤ TMAX and all other limits are at TA = 25°C, unless otherwise specified.
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DAC101C081, DAC101C081Q, DAC101C085 www.ti.com SNVS801A – APRIL 2012 – REVISED MARCH 2013 Electrical Characteristics (continued) The following specifications apply for VA = +2.7V to +5.5V, VREF = VA, CL = 200 pF to GND, input code range 12 to 1011. Boldface limits apply for TMIN ≤ TA ≤ TMAX and all other limits are at TA = 25°C, unless otherwise specified. Symbol Parameter Test Conditions Typ (1) Limits (1) Units (Limits) LOGIC INPUT CHARACTERISTICS (ADR0, ADR1) VIH Input High Voltage VA- 0.
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DAC101C081, DAC101C081Q, DAC101C085 SNVS801A – APRIL 2012 – REVISED MARCH 2013 www.ti.com AC and Timing Characteristics The following specifications apply for VA = +2.7V to +5.5V, VREF = VA, RL = Infinity, CL = 200 pF to GND. Boldface limits apply for TMIN ≤ TA ≤ TMAX and all other limits are at TA = 25°C, unless otherwise specified. Typ (2) Limits (1) (2) Units (Limits) 100h to 300h code change RL = 2kΩ, CL = 200 pF 4.5 6 µs (max) 1 V/µs Code change from 200h to 1FFh 12 nV-sec 0.
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DAC101C081, DAC101C081Q, DAC101C085 www.ti.com SNVS801A – APRIL 2012 – REVISED MARCH 2013 AC and Timing Characteristics (continued) The following specifications apply for VA = +2.7V to +5.5V, VREF = VA, RL = Infinity, CL = 200 pF to GND. Boldface limits apply for TMIN ≤ TA ≤ TMAX and all other limits are at TA = 25°C, unless otherwise specified.
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DAC101C081, DAC101C081Q, DAC101C085 SNVS801A – APRIL 2012 – REVISED MARCH 2013 www.ti.com Specification Definitions DIFFERENTIAL NON-LINEARITY (DNL) is the measure of the maximum deviation from the ideal step size of 1 LSB, which is VREF / 1024 = VA / 1024. DIGITAL FEEDTHROUGH is a measure of the energy injected into the analog output of the DAC from the digital inputs when the DAC output is not updated. It is measured with a full-scale code change on the data bus.
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DAC101C081, DAC101C081Q, DAC101C085 www.ti.com SNVS801A – APRIL 2012 – REVISED MARCH 2013 FSE 1023 x VREF 1024 GE = FSE - ZE FSE = GE + ZE OUTPUT VOLTAGE ZE 0 0 1023 DIGITAL INPUT CODE Figure 4. Input / Output Transfer Characteristic SDA tLOW tf tr tHD;STA tr tf tBUF tSP SCL tSU;STA tHD;STA tHIGH tHD;DAT tSU;STO tSU;DAT STOP REPEATED START START START Figure 5.
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DAC101C081, DAC101C081Q, DAC101C085 SNVS801A – APRIL 2012 – REVISED MARCH 2013 www.ti.com Typical Performance Characteristics VREF = VA, fSCL = 3.4MHz, TA = 25°C, Input Code Range 12 to 1011, unless otherwise stated. 12 INL DNL Figure 6. Figure 7. INL/DNL vs Temperature at VA = 3.0V INL/DNL vs Temperature at VA = 5.0V Figure 8. Figure 9. INL/DNL vs VREFIN at VA = 3.0V INL/DNL vs VREFIN at VA = 5.0V Figure 10. Figure 11.
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DAC101C081, DAC101C081Q, DAC101C085 www.ti.com SNVS801A – APRIL 2012 – REVISED MARCH 2013 Typical Performance Characteristics (continued) VREF = VA, fSCL = 3.4MHz, TA = 25°C, Input Code Range 12 to 1011, unless otherwise stated. INL/DNL vs VA Zero Code Error vs. VA Figure 12. Figure 13. Zero Code Error vs. Temperature Full Scale Error vs. VA Figure 14. Figure 15. Full Scale Error vs. Temperature Total Supply Current vs. VA Figure 16. Figure 17.
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DAC101C081, DAC101C081Q, DAC101C085 SNVS801A – APRIL 2012 – REVISED MARCH 2013 www.ti.com Typical Performance Characteristics (continued) VREF = VA, fSCL = 3.4MHz, TA = 25°C, Input Code Range 12 to 1011, unless otherwise stated. VREF Supply Current vs. VA Total Supply Current vs. Temperature @ VA = 3V Figure 18. Figure 19. Total Supply Current vs. Temperature @ VA = 5V 5V Glitch Response Figure 20. Figure 21. Power-On Reset Figure 22.
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DAC101C081, DAC101C081Q, DAC101C085 www.ti.com SNVS801A – APRIL 2012 – REVISED MARCH 2013 FUNCTIONAL DESCRIPTION DAC SECTION The DAC101C081 is fabricated on a CMOS process with an architecture that consists of switches and resistor strings that are followed by an output buffer. For simplicity, a single resistor string is shown in Figure 23. This string consists of 1024 equal valued resistors with a switch at each junction of two resistors, plus a switch to ground.
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DAC101C081, DAC101C081Q, DAC101C085 SNVS801A – APRIL 2012 – REVISED MARCH 2013 www.ti.com REFERENCE VOLTAGE The DAC101C081 uses the supply (VA) as the reference. With that said, VA must be treated as a reference. The Analog output will only be as clean as the reference (VA). It is recommended that the reference be driven by a voltage source with low output impedance. The DAC101C085 comes with an external reference supply pin (VREF).
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DAC101C081, DAC101C081Q, DAC101C085 www.ti.com SDA SNVS801A – APRIL 2012 – REVISED MARCH 2013 1 2 6 MSB R/W Direction Bit Acknowledge from the Device 7-bit Slave Address SCL ACK LSB MSB 7 8 9 LSB N/ACK Data Byte *Acknowledge or Not-ACK 1 8 2 9 Repeated for the Lower Data Byte and Additional Data Transfers START or REPEATED START STOP *Note: In continuous mode, this bit must be an ACK from the data receiver.
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DAC101C081, DAC101C081Q, DAC101C085 SNVS801A – APRIL 2012 – REVISED MARCH 2013 www.ti.com SDA NACK MSB 8-ELW 0DVWHU FRGH ³00001[[[´ 7-bit Slave Address Not-Acknowledge from the Device 1 SCL 2 6 5 8 7 9 1 2 Repeated START START Standard-Fast Mode Hs-Mode Figure 25. Beginning Hs-Mode Communication I2C™ Slave (Hardware) Address The DAC has a seven-bit I2C™ slave address. For the VSSOP-8 version of the DAC, this address is configured by the ADR0 and ADR1 address selection inputs.
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DAC101C081, DAC101C081Q, DAC101C085 www.ti.com SNVS801A – APRIL 2012 – REVISED MARCH 2013 Writing to the DAC Register To write to the DAC, the master addresses the part with the correct slave address (A6-A0) and writes a "zero" to the read/write bit. If addressed correctly, the DAC returns an ACK to the master. The master then sends out the upper data byte. The DAC responds by sending an ACK to the master. Next, the master sends the lower data byte to the DAC. The DAC responds by sending an ACK again.
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DAC101C081, DAC101C081Q, DAC101C085 SNVS801A – APRIL 2012 – REVISED MARCH 2013 www.ti.com LSB MSB X X PD1 PD0 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 0 0 DATA BITS 0 0 1 1 0 1 0 1 Normal Operation. 2.5 kÖ to GND. 100 kÖ to GND. High Impedance. Power-Down Modes Figure 28. DAC Register Contents POWER-ON RESET The power-on reset circuit controls the output voltage of the DAC during power-up. Upon application of power, the DAC register is filled with zeros and the output voltage is 0 Volts.
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DAC101C081, DAC101C081Q, DAC101C085 www.ti.com SNVS801A – APRIL 2012 – REVISED MARCH 2013 SCL SDA toutz Figure 29. Data Output Timing The toutz specification is typically 87nsec in Standard-Fast Mode and 38nsec in Hs-Mode.
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DAC101C081, DAC101C081Q, DAC101C085 SNVS801A – APRIL 2012 – REVISED MARCH 2013 www.ti.com APPLICATIONS INFORMATION USING REFERENCES AS POWER SUPPLIES While the simplicity of the DAC101C081 implies ease of use, it is important to recognize that the path from the reference input (VA for the DAC101C081 & VREF for the DAC101C085) to VOUT will have essentially zero Power Supply Rejection Ratio (PSRR). Therefore, it is necessary to provide a noise-free supply voltage to the reference.
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DAC101C081, DAC101C081Q, DAC101C085 www.ti.com SNVS801A – APRIL 2012 – REVISED MARCH 2013 LM4050 Available with accuracy of 0.44%, the LM4050 shunt reference is also a good choice as a reference for the DAC101C081. It is available in 4.096V and 5V versions and comes in a space-saving 3-pin SOT-23. Input Voltage R IDAC VZ IZ 0.1 PF 0.47 PF LM4050-4.1 or LM4050-5.0 VA VREF DAC101C081/5 VOUT = 0V to 5V SDA SCL Figure 31.
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DAC101C081, DAC101C081Q, DAC101C085 SNVS801A – APRIL 2012 – REVISED MARCH 2013 www.ti.com LP3985 The LP3985 is a low noise, ultra low dropout voltage regulator with a 3% accuracy over temperature. It is a good choice for applications that do not require a precision reference for the DAC101C081. It comes in 3.0V, 3.3V and 5V versions, among others, and sports a low 30 µV noise specification at low frequencies.
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DAC101C081, DAC101C081Q, DAC101C085 www.ti.com SNVS801A – APRIL 2012 – REVISED MARCH 2013 BIPOLAR OPERATION The DAC101C081 is designed for single supply operation and thus has a unipolar output. However, a bipolar output may be obtained with the circuit in Figure 34. This circuit will provide an output voltage range of ±5 Volts. A rail-to-rail amplifier should be used if the amplifier supplies are limited to ±5V. 10 pF R2 +5V R1 +5V 10 PF + - 0.1 PF ±5V + DAC101C081 SDA -5V VOUT SCL Figure 34.
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DAC101C081, DAC101C081Q, DAC101C085 SNVS801A – APRIL 2012 – REVISED MARCH 2013 www.ti.com DAC101C081/5 10 PF VREF 4.7 PF VA 0.1 PF Regulated Supply RP RP VDD PController R S* SDA SDA SCL SCL R S* ADC101C021 SDA SCL I2C Device SDA SCL *NOTE: RS is optional. Figure 35. Serial Interface Connection Diagram Interfacing to a Hs-mode Bus Interfacing to a Hs-mode bus is very similar to interfacing to a Standard-Fast mode bus. In Hs-mode, the specified rise time of SCL is shortened.
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DAC101C081, DAC101C081Q, DAC101C085 www.ti.com SNVS801A – APRIL 2012 – REVISED MARCH 2013 REVISION HISTORY Changes from Original (March 2013) to Revision A • Page Changed layout of National Data Sheet to TI format ..........................................................................................................
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com (4) 7-Oct-2013 There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device.
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PACKAGE MATERIALS INFORMATION www.ti.com 23-Sep-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device DAC101C081CIMK/NOPB DAC101C081CIMKX/NOP B Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant SOT DDC 6 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 SOT DDC 6 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 DAC101C081CISD/NOPB WSON NGF 6 1000 178.0 12.4 2.8 2.5 1.0 8.0 12.
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PACKAGE MATERIALS INFORMATION www.ti.com 23-Sep-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) DAC101C081CIMK/NOPB SOT DDC 6 1000 210.0 185.0 35.0 SOT DDC 6 3000 210.0 185.0 35.0 WSON NGF 6 1000 210.0 185.0 35.0 WSON NGF 6 4500 367.0 367.0 35.0 DAC101C081CIMKX/NOP B DAC101C081CISD/NOPB DAC101C081CISDX/NOP B WSON NGF 6 1000 210.0 185.0 35.
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MECHANICAL DATA NGF0006A www.ti.
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