Datasheet

+
-
20 k:
20 k:
V
BIAS
LMP7731
+5V
DAC088S085
Controller
REF
V
A
+5V
4.7 PF
+
-
+
-
ADC121S705
REF
Controller
LMP7702
R
I
R
F
R
F
Bridge
Sensor
+5V
CSB
SCLK
DOUT
SYNCB
SCLK
DIN
REF
REF
DAC088S085
+5V
Channel B
Channel A
Av = 1 + 2
R
F
R
I
DAC088S085
www.ti.com SNAS424C –AUGUST 2007–REVISED MARCH 2013
Figure 39. Driving an ADC Reference
Programmable Attenuator
Figure 40 shows one of the channels of the DAC088S085 being used as a single-quadrant multiplier. In this
configuration, an AC or DC signal can be driven into one of the reference pins. The SPI interface of the DAC can
be used to digitally attenuate the signal to any level from 0dB (full scale) to 0V. This is accomplished without
adding any noticeable level of noise to the signal. An amplifier stage is shown in Figure 40 as a reference for
applications where the input signal requires amplification. Note how the AC signal in this application is ac-
coupled to the amplifier before being amplified. A separate bias voltage is used to set the common-mode voltage
for the DAC088S085's reference input to V
A
/ 2, allowing the largest possible input swing. The multiplying
bandwidth of V
REF1,2
is 360kHz with a V
CM
of 2.5V and a peak-to-peak signal swing of 2V.
Figure 40. Programmable Attenuator
DSP/MICROPROCESSOR INTERFACING
Interfacing the DAC088S085 to microprocessors and DSPs is quite simple. The following guidelines are offered
to hasten the design process.
ADSP-2101/ADSP2103 Interfacing
Figure 41 shows a serial interface between the DAC088S085 and the ADSP-2101/ADSP2103. The DSP should
be set to operate in the SPORT Transmit Alternate Framing Mode. It is programmed through the SPORT control
register and should be configured for Internal Clock Operation, Active Low Framing and 16-bit Word Length.
Transmission is started by writing a word to the Tx register after the SPORT mode has been enabled.
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