Datasheet

MICROWIRE

DEVICE

DAC082S085

SCLK

DIN

SYNC

DAC082S085

SNAS365F –MAY 2006–REVISED MARCH 2013

www.ti.com

Microwire Interface

Figure 39 shows an interface between a Microwire compatible device and the DAC082S085. Data is clocked out

on the rising edges of the SK signal. As a result, the SK of the Microwire device needs to be inverted before

driving the SCLK of the DAC082S085.

Figure 39. Microwire Interface

LAYOUT, GROUNDING, AND BYPASSING

For best accuracy and minimum noise, the printed circuit board containing the DAC082S085 should have

separate analog and digital areas. The areas are defined by the locations of the analog and digital power planes.

Both of these planes should be located in the same board layer. There should be a single ground plane. A single

ground plane is preferred if digital return current does not flow through the analog ground area. Frequently a

single ground plane design will utilize a "fencing" technique to prevent the mixing of analog and digital ground

current. Separate ground planes should only be utilized when the fencing technique is inadequate. The separate

ground planes must be connected in one place, preferably near the DAC082S085. Special care is required to

ensure that digital signals with fast edge rates do not pass over split ground planes. They must always have a

continuous return path below their traces.

The DAC082S085 power supply should be bypassed with a 10µF and a 0.1µF capacitor as close as possible to

the device with the 0.1µF right at the device supply pin. The 10µF capacitor should be a tantalum type and the

0.1µF capacitor should be a low ESL, low ESR type. The power supply for the DAC082S085 should only be

used for analog circuits.

Avoid crossover of analog and digital signals and keep the clock and data lines on the component side of the

board. The clock and data lines should have controlled impedances.

Product Folder Links: DAC082S085