Datasheet

DAC081C081, DAC081C085
www.ti.com SNAS449D –FEBRUARY 2008–REVISED MARCH 2013
A.C. and Timing Characteristics (continued)
Values shown in this table are design targets and are subject to change before product release.
The following specifications apply for V
A
= +2.7V to +5.5V, V
REF
= V
A
, R
L
= Infinity, C
L
= 200 pF to GND. Boldface limits
apply for T
MIN
≤ T
A
≤ T
MAX
and all other limits are at T
A
= 25°C, unless otherwise specified.
Units
Symbol Parameter Conditions
(1)
Typical
(2)
Limits
(1)(2)
(Limits)
Standard Mode 300 ns (max)
20+0.1C
b
ns (min)
Fast Mode
300 ns (max)
t
fCL
Fall time of a SCL signal
10 ns (min)
High Speed Mode, C
b
= 100pF
40 ns (max)
20 ns (min)
High Speed Mode, C
b
= 400pF
80 ns (max)
Capacitive load for each bus line (SCL
C
b
400 pF (max)
and SDA)
Fast Mode 50 ns (max)
t
SP
Pulse Width of spike suppressed
(5)(6)
High Speed Mode 10 ns (max)
SDA output delay (see ADDITIONAL Fast Mode 87 270 ns (max)
t
outz
TIMING INFORMATION: t
outz
) High Speed Mode 38 60 ns (max)
(5) Spike suppression filtering on SCL and SDA will supress spikes that are less than 50ns for standard-fast mode and less than 10ns for
hs-mode.
(6) This parameter is ensured by design and/or characterization and is not tested in production.
Specification Definitions
DIFFERENTIAL NON-LINEARITY (DNL) is the measure of the maximum deviation from the ideal step size of 1
LSB, which is V
REF
/ 256 = V
A
/ 256.
DIGITAL FEEDTHROUGH is a measure of the energy injected into the analog output of the DAC from the digital
inputs when the DAC output is not updated. It is measured with a full-scale code change on the data bus.
FULL-SCALE ERROR is the difference between the actual output voltage with a full scale code (FFFh) loaded
into the DAC and the value of V
A
x 255 / 256.
GAIN ERROR is the deviation from the ideal slope of the transfer function. It can be calculated from Zero and
Full-Scale Errors as GE = FSE - ZE, where GE is Gain error, FSE is Full-Scale Error and ZE is Zero Error.
GLITCH IMPULSEis the energy injected into the analog output when the input code to the DAC register
changes. It is specified as the area of the glitch in nanovolt-seconds.
INTEGRAL NON-LINEARITY (INL)is a measure of the deviation of each individual code from a straight line
through the input to output transfer function. The deviation of any given code from this straight line is
measured from the center of that code value. The end point method is used. INL for this product is
specified over a limited range, per the Electrical Tables.
LEAST SIGNIFICANT BIT (LSB) is the bit that has the smallest value or weight of all bits in a word. This value
is LSB = V
REF
/ 2
n
where V
REF
is the supply voltage for this product, and "n" is the DAC resolution in bits,
which is 8 for the DAC081C081.
MAXIMUM LOAD CAPACITANCEis the maximum capacitance that can be driven by the DAC with output
stability maintained.
MONOTONICITY is the condition of being monotonic, where the DAC has an output that never decreases when
the input code increases.
MOST SIGNIFICANT BIT (MSB) is the bit that has the largest value or weight of all bits in a word. Its value is
1/2 of V
A
.
MULTIPLYING BANDWIDTH is the frequency at which the output amplitude falls 3dB below the input sine wave
on V
REFIN
with a full-scale code loaded into the DAC.
POWER EFFICIENCY is the ratio of the output current to the total supply current. The output current comes from
the power supply. The difference between the supply and output currents is the power consumed by the
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