Datasheet

Snap
Back
GND
D1
PIN
V+
2.1k
41.5k
41.5k
DAC081C081, DAC081C085
www.ti.com SNAS449D –FEBRUARY 2008–REVISED MARCH 2013
PIN DESCRIPTIONS (continued)
Symbol Type Equivalent Circuit Description
Tri-state Address Selection Input. Sets the two Least
Digital Input,
ADR0 Significant Bits (A1 & A0) of the 7-bit slave address.
three levels
(see Table 1)
Digital Input, Tri-state Address Selection Input. Sets Bits A6 & A3 of the
ADR1
three levels 7-bit slave address. (see Table 1)
Unbufferred reference voltage. For the VSSOP-8, this
V
REF
Supply supply is used as the reference. V
REF
must be free of noise
and decoupled to GND.
Exposed die attach pad can be connected to ground or left
PAD floating. Soldering the pad to the PCB offers optimal thermal
Ground
(WSON only) performance and enhances package self-alignment during
reflow.
Package Pinouts Problem COL4
V
OUT
V
A
GND SDA SCL ADR0 ADR1 V
REF
PAD (WSON only)
SOT 1 2 3 4 5 6 N/A N/A N/A
WSON 6 5 4 3 2 1 N/A N/A 7
VSSOP-8 8 6 5 4 3 1 2 7 N/A
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
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