Datasheet
DAC081C081/5
PController
SDA
SCL
SDA
SCL
0.1 PF
V
A
4.7 PF
R
P
R
P
ADC081C021
SDA
SCL
Regulated Supply
I
2
C Device
SDA
SCL
*NOTE: R
S
is optional.
V
DD
V
REF
10 PF
R
S
*
R
S
*
DAC081C081, DAC081C085
SNAS449D –FEBRUARY 2008–REVISED MARCH 2013
www.ti.com
Table 2. Some Rail-to-Rail Amplifiers
AMP PKGS Typ V
OS
Typ I
SUPPLY
LMP7701 SOT23-5 37 uV 0.79 mA
LMV841 SC70-5 50 uV 1 mA
LMC7111 SOT23-5 0.9 mV 25 µA
SO-8
LM7301 0.03 mV 620 µA
SOT23-5
LM8261 SOT23-5 0.7 mV 1 mA
DSP/MICROPROCESSOR INTERFACING
Interfacing the DAC081C081 to microprocessors and DSPs is quite simple. The following guidelines are offered
to simplify the design process.
Interfacing to the 2-wire Bus
Figure 32 shows a microcontroller interfacing to the DAC081C081 via the 2-wire bus. Pull-up resistors (Rp)
should be chosen to create an appropriate bus rise time and to limit the current that will be sunk by the open-
drain outputs of the devices on the bus. Please refer to the I
2
C Specification for further details. Typical pull-up
values to use in Standard-Fast mode bus applications are 2kΩ to 10kΩ. SCL and SDA series resisters (R
S
) near
the DAC081C081 are optional. If high-voltage spikes are expected on the 2-wire bus, series resistors should be
used to filter the voltage on SDA and SCL. The value of the series resistance must be picked to ensure the V
IL
threshold can be achieved. If used, R
S
is typically 51Ω.
Figure 32. Serial Interface Connection Diagram
Interfacing to a Hs-mode Bus
Interfacing to a Hs-mode bus is very similar to interfacing to a Standard-Fast mode bus. In Hs-mode, the
specified rise time of SCL is shortened. To create a faster rise time, the master device (microcontroller) can drive
the SCL bus high and low. In other words, the microcontroller can drive the line high rather than leaving it to the
pull-up resistor. It is also possible to decrease the value of the pull-up resistors or increase the pull-up current to
meet the tighter timing specs. Please refer to the I
2
C Specification for further details.
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