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CY74FCT825T

8-BIT BUS-INTERFACE REGISTER

WITH 3-STATE OUTPUTS

SCCS070A – OCTOBER 2001 – REVISED NOVEMBER 2001

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Function, Pinout, and Drive Compatible

With FCT, F Logic, and AM29825

Reduced V

(Typically = 3.3 V) Version of

Equivalent FCT Functions

Edge-Rate Control Circuitry for

Significantly Improved Noise

Characteristics

off

Supports Partial-Power-Down Mode

Operation

Matched Rise and Fall Times

Fully Compatible With TTL Input and

Output Logic Levels

ESD Protection Exceeds JESD 22

– 2000-V Human-Body Model (A114-A)

– 200-V Machine Model (A115-A)

– 1000-V Charged-Device Model (C101)

64-mA Output Sink Current

32-mA Output Source Current

High-Speed Parallel Register With

Positive-Edge-Triggered D-Type Flip-Flops

Buffered Common Clock-Enable (EN) and

Asynchronous-Clear (CLR

) Inputs

3-State Outputs

description

This bus-interface register is designed to eliminate the extra packages required to buffer existing registers and

provide extra data width for wider address/data paths or buses carrying parity. The CY74FCT825T is an 8-bit

buffered register with all the CY74FCT823T controls, plus multiple enables (OE

, OE

) to allow multiuser

control of the interface, e.g., CS

, DMA, and RD/WR. This device is ideal for use as an output port requiring high

This device is designed for high-capacitance load drive capability, while providing low-capacitance bus loading

at both inputs and outputs. Outputs are designed for low-capacitance bus loading in the high-impedance state.

This device is fully specified for partial-power-down applications using I

off

. The I

off

circuitry disables the outputs,

preventing damaging current backflow through the device when it is powered down.

ORDERING INFORMATION

PACKAGE

†

SPEED

(ns)

ORDERABLE

PART NUMBER

TOP-SIDE

MARKING

–40°C to 85°C QSOP – Q Tape and reel 6 CY74FCT825CTQCT FCT825C

†

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines

are available at www.ti.com/sc/package.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

CLR

GND

Q PACKAGE

(TOP VIEW)

Summary of content (14 pages)

PAGE 1
CY74FCT825T 8-BIT BUS-INTERFACE REGISTER WITH 3-STATE OUTPUTS SCCS070A – OCTOBER 2001 – REVISED NOVEMBER 2001 D D D D D D D D D D D Q PACKAGE (TOP VIEW) Function, Pinout, and Drive Compatible With FCT, F Logic, and AM29825 Reduced VOH (Typically = 3.
PAGE 2
CY74FCT825T 8-BIT BUS-INTERFACE REGISTER WITH 3-STATE OUTPUTS SCCS070A – OCTOBER 2001 – REVISED NOVEMBER 2001 PIN DESCRIPTION NAME I/O D I D flip-flop data inputs CLR I When CLR is low and OE is low, Q outputs are low. When CLR is high, data can be entered into the register. CP O Clock pulse for the register. Enters data into the register on the low-to-high clock transition. Y O Register 3-state outputs EN I Clock enable.
PAGE 3
CY74FCT825T 8-BIT BUS-INTERFACE REGISTER WITH 3-STATE OUTPUTS SCCS070A – OCTOBER 2001 – REVISED NOVEMBER 2001 absolute maximum rating over operating free-air temperature range (unless otherwise noted)† Supply voltage range to ground potential . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V DC input voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.
PAGE 4
CY74FCT825T 8-BIT BUS-INTERFACE REGISTER WITH 3-STATE OUTPUTS SCCS070A – OCTOBER 2001 – REVISED NOVEMBER 2001 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS VIK VCC = 4.75 V, VOH VCC = 4 4.75 75 V VOL Vhys VCC = 4.75 V, All inputs II IIH VCC = 5.25 V, VCC = 5.25 V, VIN = VCC VIN = 2.7 V IIL IOZH VCC = 5.25 V, VCC = 5.25 V, VIN = 0.5 V VOUT = 2.7 V IOZL IOS‡ VCC = 5.25 V, VCC = 5.25 V, VOUT = 0.
PAGE 5
CY74FCT825T 8-BIT BUS-INTERFACE REGISTER WITH 3-STATE OUTPUTS SCCS070A – OCTOBER 2001 – REVISED NOVEMBER 2001 timing requirements over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1) PARAMETER TEST LOAD CP tw Pulse duration tsu time before CP↑ Setup time, th Hold time, time after CP↑ trec Recovery time CLR low Data EN Data EN CLR before CP↑ CY74FCT825AT MIN MAX CY74FCT825BT MIN MAX CY74FCT825CT MIN CL = 50 pF,, RL = 500 Ω 7 6 6 6 6 6 CL = 50 p
PAGE 6
CY74FCT825T 8-BIT BUS-INTERFACE REGISTER WITH 3-STATE OUTPUTS SCCS070A – OCTOBER 2001 – REVISED NOVEMBER 2001 PARAMETER MEASUREMENT INFORMATION 7V From Output Under Test From Output Under Test Test Point CL = 50 pF (see Note A) Open TEST S1 tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open 7V Open GND CL = 50 pF (see Note A) 500 Ω S1 500 Ω 500 Ω LOAD CIRCUIT FOR 3-STATE OUTPUTS LOAD CIRCUIT FOR TOTEM-POLE OUTPUTS 3V 1.5 V Timing Input 0V tw tsu 3V 1.5 V Input 1.5 V th 3V 1.5 V Data Input 1.
PAGE 7
PACKAGE OPTION ADDENDUM www.ti.
PAGE 8
PACKAGE OPTION ADDENDUM www.ti.com 11-Apr-2013 Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties.
PAGE 9
PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device CY74FCT825CTQCT Package Package Pins Type Drawing SSOP DBQ 24 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 2500 330.0 16.4 Pack Materials-Page 1 6.5 B0 (mm) K0 (mm) P1 (mm) 9.0 2.1 8.0 W Pin1 (mm) Quadrant 16.
PAGE 10
PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) CY74FCT825CTQCT SSOP DBQ 24 2500 367.0 367.0 38.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.