Datasheet

CY74FCT821T
10-BIT BUS-INTERFACE REGISTER
WITH 3-STATE OUTPUTS
SCCS033B– MAY 1994 – REVISED NOVEMBER 2001
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ORDERING INFORMATION
T
A
PACKAGE
†
SPEED
(ns)
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
QSOP – Q Tape and reel 6 CY74FCT821CTQCT FCT821C
SOIC SO
Tube 6 CY74FCT821CTSOC
FCT821C
SOIC
–
SO
Tape and reel 6 CY74FCT821CTSOCT
FCT821C
DIP – P Tube 7.5 CY74FCT821BTPC CY74FCT821BTPC
–40°C to 85°C
SOIC SO
Tube 7.5 CY74FCT821BTSOC
FCT821B
SOIC
–
SO
Tape and reel 7.5 CY74FCT821BTSOCT
FCT821B
QSOP – Q Tape and reel 10 CY74FCT821ATQCT FCT821A
SOIC SO
Tube 10 CY74FCT821ATSOC
FCT821A
SOIC
–
SO
Tape and reel 10 CY74FCT821ATSOCT
FCT821A
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
FUNCTION TABLE
INPUTS
INTERNAL
OUTPUTS
FUNCTION
OE D CP Q Y
H X ↑ L Z Z
H L ↑ L Z
H H ↑ H Z
Load
L L ↑ L L
Load
L H ↑ H H
H = High logic level, L = Low logic level, X = Don’t care,
↑ = Low-to-high transition, Z = High-impedance state
logic diagram (positive logic)
To Nine Other Channels
Y
0
D
0
OE
CP
Q
D
0
C
0
13
1
2
23