Datasheet

CY54FCT374T, CY74FCT374T
8-BIT REGISTERS
WITH 3-STATE OUTPUTS
SCCS022A – MAY 1994 – REVISED OCTOBER 2001
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ORDERING INFORMATION
T
A
PACKAGE
†
SPEED
(ns)
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
QSOP – Q Tape and reel 5.2 CY74FCT374CTQCT FCT374C
SOIC SO
Tube 5.2 CY74FCT374CTSOC
FCT374C
SOIC
–
SO
Tape and reel 5.2 CY74FCT374CTSOCT
FCT374C
DIP – P Tube 6.5 CY74FCT374ATPC CY74FCT374ATPC
40°Cto85°C
QSOP – Q Tape and reel 6.5 CY74FCT374ATQCT FCT374A
–
40°C
t
o
85°C
SOIC SO
Tube 6.5 CY74FCT374ATSOC
FCT374A
SOIC
–
SO
Tape and reel 6.5 CY74FCT374ATSOCT
FCT374A
QSOP – Q Tape and reel 10 CY74FCT374TQCT FCT374
SOIC SO
Tube 10 CY74FCT374TSOC
FCT374
SOIC
–
SO
Tape and reel 10 CY74FCT374TSOCT
FCT374
CDIP – D Tube 6.2 CY54FCT374CTDMB
LCC – L Tube 6.2 CY54FCT374CTLMB
55°C to 125°C
CDIP – D Tube 7.2 CY54FCT374ATDMB
–
55°C
to
125°C
LCC – L Tube 7.2 CY54FCT374ATLMB
CDIP – D Tube 11 CY54FCT374TDMB
LCC – L Tube 11 CY54FCT374TLMB
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available
at www.ti.com/sc/package.
FUNCTION TABLE
INPUTS
OUTPUT
D CP OE
O
H ↑ L H
L ↑ LL
X X H Z
H = High logic level, L = Low logic level,
X = Don’t care, Z = High-impedance state,
↑ = Low-to-high clock transition
logic diagram (positive logic)
OE
To Seven Other Channels
1
11
3
2
CP
D
0
C1
1D
O
0
Q