Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsLogic ICsLogic IC - Flip-Flop Master rest Non-inverting SOIC 20

CY54FCT273T, CY74FCT273T

8-BIT REGISTERS

SCCS020A – MARCH 1995 – REVISED OCTOBER 2001

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Function, Pinout, and Drive Compatible

With FCT and F Logic

Reduced V

(Typically = 3.3 V) Versions

of Equivalent FCT Functions

Edge-Rate Control Circuitry for

Significantly Improved Noise

Characteristics

off

Supports Partial-Power-Down Mode

Operation

Matched Rise and Fall Times

ESD Protection Exceeds JESD 22

– 2000-V Human-Body Model (A114-A)

– 200-V Machine Model (A115-A)

– 1000-V Charged-Device Model (C101)

Fully Compatible With TTL Input and

Output Logic Levels

CY54FCT273T

– 32-mA Output Sink Current

– 12-mA Output Source Current

CY74FCT273T

– 64-mA Output Sink Current

– 32-mA Output Source Current

description

The ’FCT273T devices consist of eight

edge-triggered D-type flip-flops with individual

D inputs and Q outputs. The common

buffered-clock (CP) and master-reset (MR

) inputs

load and reset all flip-flops simultaneously. These

devices are edge-triggered registers. The state of

each D input (one setup time before the

low-to-high clock transition) is transferred to the

corresponding flip-flop’s Q output. All outputs are

forced low by a low logic level on the MR

input.

This device is fully specified for

partial-power-down applications using I

off

. The I

off

circuitry disables the outputs, preventing

damaging current backflow through the device

when it is powered down.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

CY54FCT273T ...D PACKAGE

CY74FCT273T ...Q OR SO PACKAGE

(TOP VIEW)

CY54FCT273T . . . L PACKAGE

(TOP VIEW)

GND

3 2 1 20 19

9 10 11 12 13

GND

Summary of content (13 pages)

PAGE 1
CY54FCT273T, CY74FCT273T 8-BIT REGISTERS SCCS020A – MARCH 1995 – REVISED OCTOBER 2001 D D D D D description 1 20 2 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12 10 11 VCC Q7 D7 D6 Q6 Q5 D5 D4 Q4 CP CY54FCT273T . . . L PACKAGE (TOP VIEW) D1 Q1 Q2 D2 D3 Q7 D MR Q0 D0 D1 Q1 Q2 D2 D3 Q3 GND MR VCC D CY54FCT273T . . . D PACKAGE CY74FCT273T . . . Q OR SO PACKAGE (TOP VIEW) D0 Q0 D Function, Pinout, and Drive Compatible With FCT and F Logic Reduced VOH (Typically = 3.
PAGE 2
CY54FCT273T, CY74FCT273T 8-BIT REGISTERS SCCS020A – MARCH 1995 – REVISED OCTOBER 2001 ORDERING INFORMATION SPEED (ns) PACKAGE† TA QSOP – Q SOIC – SO QSOP – Q –40°C to 85°C SOIC – SO QSOP – Q SOIC – SO ORDERABLE PART NUMBER TOP-SIDE MARKING Tape and reel 5.8 CY74FCT273CTQCT FCT273C Tube 5.8 CY74FCT273CTSOC Tape and reel 5.8 CY74FCT273CTSOCT Tape and reel 7.2 CY74FCT273ATQCT Tube 7.2 CY74FCT273ATSOC Tape and reel 7.
PAGE 3
CY54FCT273T, CY74FCT273T 8-BIT REGISTERS SCCS020A – MARCH 1995 – REVISED OCTOBER 2001 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range to ground potential . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V DC input voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V DC output voltage range .
PAGE 4
CY54FCT273T, CY74FCT273T 8-BIT REGISTERS SCCS020A – MARCH 1995 – REVISED OCTOBER 2001 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VIK VOH CY54FCT273T TYP† MAX TEST CONDITIONS VCC = 4.5 V, VCC = 4.75 V, IIN = –18 mA IIN = –18 mA VCC = 4.5 V, IOH = –12 mA IOH = –32 mA VCC = 4 4.75 75 V MIN –0.7 –1.2 –0.7 2.4 2.4 Vhys All inputs II VCC = 5.5 V, VCC = 5.25 V, VIN = VCC VIN = VCC 5 IIH VCC = 5.5 V, VCC = 5.
PAGE 5
CY54FCT273T, CY74FCT273T 8-BIT REGISTERS SCCS020A – MARCH 1995 – REVISED OCTOBER 2001 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) (continued) PARAMETER ICCD¶ CY54FCT273T TYP† MAX TEST CONDITIONS MIN VCC = 5.5 V, Outputs open, One bit switching at 50% duty cycle, MR = VCC, VIN ≤ 0.2 V or VIN ≥ VCC – 0.2 V VCC = 5.25 V, Outputs open, One bit switching at 50% duty cycle, MR = VCC, VIN ≤ 0.2 V or VIN ≥ VCC – 0.2 V 5V VCC = 5 5.
PAGE 6
CY54FCT273T, CY74FCT273T 8-BIT REGISTERS SCCS020A – MARCH 1995 – REVISED OCTOBER 2001 timing requirements over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1) CY74FCT273T MIN MAX CY54FCT273AT MIN MAX CY74FCT273AT MIN MAX CY74FCT273CT MIN MAX UNIT CP 6 6 6 6 MR 6 6 6 6 Setup time, high or low D before CP↑ 2 2 2 2 ns Hold time, high or low D after CP↑ 1.5 1.5 1.5 1.5 ns Recovery time MR after CP↑ 2 2.
PAGE 7
CY54FCT273T, CY74FCT273T 8-BIT REGISTERS SCCS020A – MARCH 1995 – REVISED OCTOBER 2001 PARAMETER MEASUREMENT INFORMATION 7V From Output Under Test From Output Under Test Test Point CL = 50 pF (see Note A) Open TEST GND CL = 50 pF (see Note A) 500 Ω S1 500 Ω S1 Open 7V Open tPLH/tPHL tPLZ/tPZL tPHZ/tPZH 500 Ω LOAD CIRCUIT FOR 3-STATE OUTPUTS LOAD CIRCUIT FOR TOTEM-POLE OUTPUTS 3V 1.5 V Timing Input 0V tw tsu 3V 1.5 V Input 1.5 V th 3V 1.5 V Data Input 1.
PAGE 8
PACKAGE OPTION ADDENDUM www.ti.
PAGE 9
PACKAGE OPTION ADDENDUM www.ti.
PAGE 10
PACKAGE OPTION ADDENDUM www.ti.com 25-Sep-2013 Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.
PAGE 11
PACKAGE MATERIALS INFORMATION www.ti.com 16-Aug-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device CY74FCT273ATQCT Package Package Pins Type Drawing SSOP SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant DBQ 20 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 CY74FCT273ATSOCT SOIC DW 20 2000 330.0 24.4 10.8 13.0 2.7 12.0 24.0 Q1 CY74FCT273CTQCT SSOP DBQ 20 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.
PAGE 12
PACKAGE MATERIALS INFORMATION www.ti.com 16-Aug-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) CY74FCT273ATQCT SSOP DBQ 20 2500 367.0 367.0 38.0 CY74FCT273ATSOCT SOIC DW 20 2000 367.0 367.0 45.0 CY74FCT273CTQCT SSOP DBQ 20 2500 367.0 367.0 38.0 CY74FCT273TQCT SSOP DBQ 20 2500 367.0 367.0 38.0 CY74FCT273TSOCT SOIC DW 20 2000 367.0 367.0 45.
PAGE 13
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.