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6.6.3 Module Error Pending Register 0 (MERRPR0)
6.6.4 Module Error Pending Register 1 (MERRPR1)
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The module error pending register 0 (MERRPR0) records pending error conditions for modules 0-31.
MERRPR0 is shown in Figure 6-5 and described in Table 6-9 .
Figure 6-5. Module Error Pending Register 0 (MERRPR0)
31 0
M
R- 0
LEGEND: R = Read only; - n = value after reset
Table 6-9. Module Error Pending Register 0 (MERRPR0) Field Descriptions
Bit Field Value Description
31-0 M[ n] Module interrupt status bit for modules 0-31.
0 Module n does not have error condition.
1 Module n has error condition. See the module status n register (MDSTAT n) for error type
The module error pending register 1 (MERRPR1) records pending error conditions for modules 32-45.
MERRPR1 is shown in Figure 6-6 and described in Table 6-10 .
Figure 6-6. Module Error Pending Register 1 (MERRPR1)
31 16
Reserved
R-0
15 14 13 12 4 3 0
Reserved M Reserved M
R-0 R-0 R-0 R-0
LEGEND: R = Read only; - n = value after reset
Table 6-10. Module Error Pending Register 1 (MERRPR1) Field Descriptions
Bit Field Value Description
31-14 Reserved 0 Reserved
13 M[ n] Module interrupt status bit for module 45.
0 Module n does not have error condition.
1 Module n has error condition. See the module status n register (MDSTAT n) for error type.
12-4 Reserved 0 Reserved. (Modules 36-44 are reserved. See Table 6-1 .)
3-0 M[ n] Module interrupt status bit for modules 32-35.
0 Module n does not have error condition.
1 Module n has error condition. See the module status n register (MDSTAT n) for error type.
SPRUEP9A – May 2008 Power and Sleep Controller (PSC) 71
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