User manual
5.4.4 PLL Multiplier Control Register (PLLM)
PLL Controller Register Map
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The PLL multiplier control register (PLLM) is shown in Figure 5-7 and described in Table 5-8 .
Figure 5-7. PLL Multiplier Control Register (PLLM)
31 16
Reserved
R-0
15 5 4 0
Reserved PLLM
R-0 R/W-15h
LEGEND: R/W = Read/Write; R = Read only; - n = value after reset
Table 5-8. PLL Multiplier Control Register (PLLM) Field Descriptions
Bit Field Value Description
31-5 Reserved 0 Reserved
4-0 PLLM D-1Dh PLL Multiplier select. Multiplier Value = PLLM + 1. The valid range of multiplier values for a given
MXI/CLKIN is defined by the minimum and maximum frequency limits on the PLL VCO frequency. See
the device-specific data manual for PLL VCO frequency specification limits.
PLL Controller48 SPRUEP9A – May 2008
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