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12.5 ARM Control of DSP Boot, Clock, and Reset
12.5.1 DSP Boot
ARM Control of DSP Boot, Clock, and Reset www.ti.com
As system master, the ARM can control all of the following functions:
• Boot the DSP
• Turn the clock on/off
• Reset the DSP
To initiate these operations, firmware on the ARM must coordinate with the DSP and use the power and
sleep controller (PSC) module. This section provides specific details on how to initiate these operations.
For more information on the PSC and system control module, see Chapter 6 and Chapter 9 .
Note: The DM646x DMSoC has only one power domain (Always On); therefore, the ARM has no
control of the DSP power on/off.
The DSP can boot in either of two modes: ARM boots DSP mode or DSP self-boot mode.
• In the ARM boots DSP mode, the ARM is responsible for managing the DSP boot after power-on/reset.
• In the DSP self-boot mode, the DSP boots without ARM intervention immediately upon power-on/reset.
The boot mode is determined by sampling the DSP boot source (DSPBOOT) pin at power-on/reset
(Table 12-2 ). See Chapter 10 and Chapter 11 for more information on boot and reset modes. This section
describes the procedure to boot the DSP with the ARM, when in ARM boots DSP mode.
Table 12-2. DSP Boot Configuration
Device Configuration Function Sampled Pin Default Setting
DSP boot 0 = ARM boots DSP DSPBOOT ARM boots DSP
1 = DSP self-boots
To boot the DSP, the ARM must specify a boot address in the DSP boot address register
(DSPBOOTADDR) in the System Module and ensure that the DSP program code is loaded properly into
memory. When the ARM releases the DSP from reset, the DSP immediately begins code execution from
the boot address programmed in DSPBOOTADDR. To boot the DSP:
1. Put the DSP module in the enable state. Prior to beginning the DSP boot sequence, the DSP module
must be in the enable state. See Section 12.5.2 for information on how to execute DSP module clock
on.
2. Clear the LRST bit in the module control 1 register (MDCTL1) in the PSC to 0. This asserts the DSP
local reset. By default, after power-on reset or hard reset, the value of the LRST bit in MDCTL1 is
cleared to 0.
3. Set the DSP boot address in DSPBOOTADDR. By default, after power-on or hard reset, the value in
DSPBOOTADDR is 4220 0000h, which maps to the EMIFA. The ARM software can specify a boot
address that maps to L1P internal DSP memory, EMIFA, or DDR2 memory controller. The DSP can
execute program instructions from any of these memories.
4. Ensure that the DSP program code is loaded/stored with a reset vector at the DSP boot address
specified in the previous step.
5. Set the LRST bit in MDCTL1 to 1. This deasserts the DSP local reset. After reset is deasserted, the
DSP immediately begins code execution from the boot address programmed in DSPBOOTADDR.
128 ARM-DSP Integration SPRUEP9A – May 2008
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