Datasheet

VCC2 VCC3 VCC5 VCC6
VCC1 VCC2
VCC3
VCC4
VCC5
VCC6
VCC1 VCC4
VDD
VDD
VDD
VDD
OUTP0 OUTN0 OUTN1 OUTP1 OUTN2 OUTP2 OUTN3 OUTP3 OUTN10 OUTN9 OUTP10 OUTN8 OUTP9 OUTN11 OUTP8 OUTP11 OUTN6 OUTN5 OUTP6 OUTN4 OUTP5 OUTN7 OUTP4 OUTP7
INP0 INN0 INP1 INN1
OUTN15 OUTN14 OUTP14 OUTN13 OUTP13 OUTN12 OUTP12 OUTP15
INP0 INN0
INP1 INN1
CDCELVP1216 CUSTOMER EVAL Board
1216:VAC_REF
2108:VAC_REF0
IN_SEL
2
INP1
3
INN1
4
NC1
5
VCC1
6
VCC2
7
VAC_REF
8
INN0
9
INP0
10
NC2
11
VCC3
13
OUTP0
14
OUTN0
15
OUTP1
16
OUTN1
17
OUTP2
18
OUTN2
19
OUTP3
20
OUTN3
21
VCC4
24
OUTP4
22
OUTN4
23
OUTP5
25
OUTN5
26
OUTP6
27
OUTN6
28
OUTP7
29
OUTN7
30
VCC5
37
OUTP8
31
TH_P
AD
49
OUTN8
32
OUTP9
33
OUTN9
34
OUTP10
35
OUTN10
36
OUTP11
38
OUTN11
39
VCC6
48
GND
1
GND2
12
OUTP12
40
OUTN12
41
OUTP13
42
OUTN13
43
OUTP14
44
OUTN14
45
OUTP15
46
OUTN15
47
U2
CDCLVP1216
U2
CDCLVP1216
C142
0.1uF
C142
0.1uF
C161
0.1uF
C161
0.1uF
C73
0.1uF
C73
0.1uF
C152
0.1uF
C152
0.1uF
C144
0.1uF
C144
0.1uF
12
R154
50
R154
50
C41
10uF/6.3V
C41
10uF/6.3V
12
R153
50
R153
50
C42
10uF/6.3V
C42
10uF/6.3V
2
3
1
4
5
J105
SMA-EDGE
J105
SMA-EDGE
C68
0.1uF
C68
0.1uF
12
R152
50
R152
50
P4
VDD3.3V
P4
VDD3.3V
D26
LEDGREEN
D26
LEDGREEN
D12
MBRS2040LT3
D12
MBRS2040LT3
12
R156
0
R156
0
2
3
1
4
5
J103
SMA-EDGE
J103
SMA-EDGE
12
R120
301
R120
301
C135 10uF C135 10uF
C72
0.1uF
C72
0.1uF
C160
0.1uF
C160
0.1uF
1 2
R130
10k
R130
10k
1 2
L5
BLM15HD102SN1D
L5
BLM15HD102SN1D
P5
GND
P5
GND
C69
0.1uF
C69
0.1uF
2
3
1
4
5
J106
SMA-EDGE
J106
SMA-EDGE
C38
10uF/6.3V
C38
10uF/6.3V
1 2
JP1JP1
C136 10uF C136 10uF
1 2
L6
BLM15HD102SN1D
L6
BLM15HD102SN1D
2
3
1
4
5
J104
SMA-EDGE
J104
SMA-EDGE
C159
0.1uF
C159
0.1uF
12
R155
50
R155
50
Schematics and Layout www.ti.com
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Figure 2. CDCLVP1216EVM—Schematic
4 Low Additive Phase Noise Clock Buffer Evaluation Board SCAU029 – May 2009
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