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User's Guide

SCAU045–September 2010

Low Additive Jitter, Twelve LVDS Outputs Clock Buffer

Evaluation Board

This user's guide describes how to use the CDCLVD1212/CDCLVD2106 evaluation module (EVM) and

provides users with guidelines to build their own systems. The EVM schematics and bill of materials are

included.

Figure 1. CDCLVD1212/ CDCLVD2106 Evaluation Board

1 Features

• Easy to Use Evaluation Board to Fan-out Low Phase Noise Clocks

• Easy Device Setup

• Fast Configuration

• Control Pins Configurable through Jumpers

• Board and Device Powered at 2.5V

• Single Ended or Differential Input Clocks

• Device Supports 12 LVDS Outputs, EVM Supports 4 LVDS Outputs

SCAU045–September 2010 Low Additive Jitter, Twelve LVDS Outputs Clock Buffer Evaluation Board

Summary of content (8 pages)

PAGE 1
User's Guide SCAU045 – September 2010 Low Additive Jitter, Twelve LVDS Outputs Clock Buffer Evaluation Board This user's guide describes how to use the CDCLVD1212/CDCLVD2106 evaluation module (EVM) and provides users with guidelines to build their own systems. The EVM schematics and bill of materials are included. Figure 1.
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General Description 2 www.ti.com General Description The CDCLVD1212 and CDCLVD2106 are high performance low additive phase noise clock buffers. The devices have two universal input buffers, that supports single ended or differential clock inputs, and selectable through a control pin (for CDCLVD1212 only). The devices also feature on-chip bias generators that can provide the LVDS common mode voltage to the device inputs.
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Output Clock www.ti.com 8 Output Clock The CDCLVD1212 and CDCLVD2106 generate up to 12 LVDS outputs and 4 outputs are available on the EVM (OUT0, OUT5, OUT6 and OUT11) through the following SMAs: J5 and J6 for OUT0; J7 and J8 for OUT5; J9 and J10 for OUT6; J11 and J12 for OUT11. The LVDS outputs are AC coupled to the respective SMAs. Each output pair has an option of 100Ω termination on the board (R12, R13, R18 and R19 – not populated). All other outputs have test points.
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EVM Board Schematic and Bill of Materials www.ti.com Figure 3.
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EVM Board Schematic and Bill of Materials www.ti.com Figure 4.
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EVM Board Schematic and Bill of Materials 9.2 www.ti.
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Evaluation Board/Kit Important Notice Texas Instruments (TI) provides the enclosed product(s) under the following conditions: This evaluation board/kit is intended for use for ENGINEERING DEVELOPMENT, DEMONSTRATION, OR EVALUATION PURPOSES ONLY and is not considered by TI to be a finished end-product fit for general consumer use. Persons handling the product(s) must have electronics training and observe good engineering practice standards.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.