Datasheet
Table Of Contents
- FEATURES
- APPLICATIONS
- DESCRIPTION
- DEVICE INFORMATION
- ABSOLUTE MAXIMUM RATINGS
- THERMAL RESISTANCE FOR TSSOP (PW) PACKAGE
- RECOMMENDED OPERATING CONDITIONS
- RECOMMENDED CRYSTAL/VCXO SPECIFICATIONS
- EEPROM SPECIFICATION
- TIMING REQUIREMENTS
- DEVICE CHARACTERISTICS
- DEVICE CHARACTERISTICS (Continued)
- DEVICE CHARACTERISTICS (Continued)
- PARAMETER MEASUREMENT INFORMATION
- TYPICAL CHARACTERISTICS
- APPLICATION INFORMATION
- Control Terminal Configuration
- DEFAULT DEVICE SETTING
- SDA/SCL SERIAL INTERFACE
- DATA PROTOCOL
- Generic Programming Sequence
- Byte Write Programming Sequence
- Byte Read Programming Sequence
- Block Write Programming Sequence
- Block Read Programming Sequence
- Timing Diagram for the SDA/SCL Serial Control Interface
- SDA/SCL Hardware Interface
- SDA/SCL CONFIGURATION REGISTERS
- PLL MULTIPLIER/DIVIDER DEFINITIONPLL settings limits: 16≤q≤63, 0≤p≤7, 0≤r≤511 to PLL Multiplier/Divider Definition Section
- Revision History

0
10
20
30
40
50
60
70
80
90
100
10 60 110 160 210
PLL -Frequency-MHz
I -SupplyCurrent-mA
DD
3PLL on
V =1.8V
DD
allPLL off
1PLL on
4PLL on
2PLL on
0
5
10
15
20
25
30
35
10 30 50 70 90 110 130 150 170 190 210 230
f -OutputFrequency-MHz
OUT
I -mA
DDOUT
alloutputsoff
9outputson
7outputson
5outputson
3outputson
1outputon
V =1.8V,
V =3.3V,
NoLoad
DD
DDOUT
10 30 50 70 90 110 130 150 170 190 210 230
f -OutputFrequency-MHz
OUT
I -mA
DDOUT
0
2
4
6
8
10
12
alloutputsoff
9outputson
7outputson
5outputson
3outputson
1outputon
V =1.8V,
V =1.8V,
NoLoad
DD
DDOUT
CDCE949
CDCEL949
SCAS844D –AUGUST 2007–REVISED MARCH 2010
www.ti.com
TYPICAL CHARACTERISTICS
CDCE949 AND CDCEL949 SUPPLY CURRENT CDCE949 OUTPUT CURRENT
vs vs
PLL FREQUENCY OUTPUT FREQUENCY
Figure 3. Figure 4.
CDCEL949 OUTPUT CURRENT
vs
OUTPUT FREQUENCY
Figure 5.
8 Submit Documentation Feedback Copyright © 2007–2010, Texas Instruments Incorporated
Product Folder Link(s): CDCE949 CDCEL949