Datasheet

Application Level Circuit Diagram
5-3
Application Level Circuit Diagram
Figure 5−2. CDC7005 With an Active Loop Filter Using a CDC7005 Integrated OPA
SPI
PECL_OUT_B
PECL_OUT
V_CTRL
VCXO
CP_OUT
OPA_IP
OPA_IN
OPA_OUT
VCXO_IN
VCXO_IN_B
CTRL_LE
CTRL_DATA
CTRL_CLK
REF_IN
Yn_B
Yn
CDC7005
STATUS_LOCK
STATUS_VCXO
STATUS_REF
Vcc
245.76 MHz; Gain = 26.5kHz/V
Low-Pass Filter
C3
100 nF
R3
10 KΩ
R2
4.7 KΩ
C2
10 µF
R5
10 KΩ
R6
10 KΩ
C3
100 nF
R1
180 Ω
R
150 Ω
R
150 Ω
R
82 Ω
R
82 Ω
10 nF
10 nF
C1
100 nF
130 Ω
V
CC
130 Ω
V
CC