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2005 Clock Drivers

User’s Guide

SCAU005D

Summary of content (32 pages)

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! User’s Guide 2005 Clock Drivers SCAU005D
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.
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EVM IMPORTANT NOTICE Texas Instruments (TI) provides the enclosed product(s) under the following conditions: This evaluation kit being sold by TI is intended for use for ENGINEERING DEVELOPMENT OR EVALUATION PURPOSES ONLY and is not considered by TI to be fit for commercial use.
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EVM WARNINGS AND RESTRICTIONS It is important to operate this EVM within the supply voltage range of 3 V and 3.6 V. Exceeding the specified input range may cause unexpected operation and/or irreversible damage to the EVM. If there are questions concerning the input range, please contact a TI field representative prior to connecting the input power. Applying loads outside of the specified output range may result in unintended operation and/or possible permanent damage to the EVM.
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Related Documentation From Texas Instruments Preface About This Manual This manual explains how to use the CDC7005 evaluation module and to provide the guidelines to build the customer’s own systems. The manual includes schematics, layout, bill of materials, and a software description.
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Contents 1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1 1.1 CDC7005 Functional Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2 2 Quick Start . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-1 3 EVM Hardware . . . . . . . . . . . . . . . . . .
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Contents 3−1 4−1 5−2 5−3 5−4 6−1 6−2 6−3 6−4 6−5 Board View . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Screen View . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . CDC7005 With a Passive Loop Filter Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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Chapter 1 The CDC7005 is a high-performance, low phase noise and low skew clock synchronizer that synchronizes an on-board voltage controlled crystal oscillator (VCXO) frequency to an external reference clock. The device operates up to 800 MHz. The PLL loop bandwidth and damping factor can be adjusted to meet different system requirements by selecting the external VCXO, loop filter components, frequency for PFD, and charge pump current.
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CDC7005 Functional Block Diagram 1.
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Chapter 2 In order to setup the EVM quickly and to take some measurements at default settings, the following actions are required: - Supply 3.3 V to P1, LED D4 will be on. - Apply a single-ended reference clock to the reference clock input (REF_IN). For default setting, the reference clock must be 1/8th of VCXO frequency (if VCXO frequency is 245.76 MHz, then the reference clock must be 30.72 MHz for locking). - Connect Y0/Y0B (or Y1/Y1B) to oscilloscope in order to check output sig- nal.
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Chapter 3 This chapter discusses the EVM hardware. Topic Page 3.1 Board View and Connector Location . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-2 3.2 Connector Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-4 3.3 Hardware Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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Board View and Connector Location 3.1 Board View and Connector Location Figure 3−1.
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Connector Description 3.2 Connector Description Table 3−1. Connectors, Switches, and Indicators Reference Description P1 Power supply 3.
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Hardware Configuration 3.3.1 Power Supply (P1, P2) - Supply 3.3 V ±10% on P1 and P2 using a stabilized external power supply. J 3.3.2 WARNING: Never supply more than 3.6 V on P1. Onboard Switches and Indicators (P1, P2, D1−D4) - Push SW1 to enter the power-down mode of the CDC7005 device. Then all current sources are switched off, all outputs are switched into 3-state, and all dividers (M, N, and P) are reset to default. - Push SW2 to enter the reset mode of the device.
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Hardware Configuration 3.3.4 Loop Filter (J29−J35) The loop filter is one of the key elements determining the loop bandwidth of the PLL. The loop filter converts the charge pump current into the control voltage for the voltage controlled oscillator. The phase difference between the input clocks of the phase frequency detector determines the width of the charge pump output current pulses. These high frequency pulses are transformed into a voltage to control the oscillator.
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Hardware Configuration The reference input clock signal has to be applied to J19. The reference input clock signal can be sensed on J20. In this case, close the bridge J36 (the oscilloscope’s 50 Ω may be used to terminate the 50-Ω trace). The reference input clock sense line is matched to the LVPECL outputs line to avoid any additional delay offset. The input is ac-coupled (C57) and properly biased with 100-Ω pull-up and 100-Ω pull-down resistors. 3.3.
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Chapter 4 ! " # ! "$# This chapter discusses the serial peripheral interface software. Topic Page 4.1 Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-2 4.2 Software Installation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-3 1) Copyright 2005 National Instruments Corporation. All Rights Reserved. Copyright 2005 Texas Instruments Incorporated. All Rights Reserved.
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Functional Description 4.1 Functional Description Programming software is required for programming the internal control register of the CDC7005 in the EVM. The software runs under Windows 2000 / XP / XP *64. A quick installation is required prior to use. See Section 4.2 Software Installation. There are several cases where programming is mandatory: - Figure 4−1. Screen View 4-2 Using an active loop filter Reference clock and VCXO clock do not have a ratio of 1:8.
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Software Installation 4.2 Software Installation Use the following steps to install the SPI control software. 1) Download the CDC7005 SPI Software from the TI Website (www.ti.com) 2) Run program setup.
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Chapter 5 % & ' ( ) This chapter discusses the application level circuit diagram. Topic 5.1 Page Application Level Circuit Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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Application Level Circuit Diagram 5.1 Application Level Circuit Diagram In the following applications sections all three loop filter configurations are discussed. 5.1.1 Passive Loop Filter The passive loop filter is a second order filter (two poles, one zero). The zero is required for the overall loop stability. R1, C1, and C2 generate the dominant pole of the system. A second pole is introduced by R2 and C3. Figure 5−1.
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Application Level Circuit Diagram Figure 5−2. CDC7005 With an Active Loop Filter Using a CDC7005 Integrated OPA VCXO 245.76 MHz; Gain = 26.5kHz/V Low-Pass Filter V_CTRL PECL_OUT_B C3 100 nF PECL_OUT Vcc R3 10 KΩ R2 4.
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Application Level Circuit Diagram 5.1.3 Active Loop Filter—External Operational Amplifier Figure 5−3. CDC7005 With an Active Loop Filter Using OPA341 Low-Pass Filter R3 10 KΩ VCXO 245.76 MHz; Gain = 26.
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Chapter 6 & * + & , * ) This chapter contains the parts list, board layout, and schematic for the CDC7005 EVM. Topic Page 6.1 Parts List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-2 6.2 Board Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-4 6.3 Schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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Parts List 6.1 Parts List Item Qty Reference Designator Part Part Number 1 3 C14, C15, C78 22 µF, 16 V 20% tantalum TE SMD Panasonic ECS−T1CC226R 2 4 C16, C64, C65, C79 10 µF, 16 V TANT TEH SER SMD Panasonic ECS−H1CC106R 3 4 C17, C80, C35, C55 0.1 µF, 16 V ceramic Y5V 0402 Yageo 04022F104Z7B20D 4 2 C81, C18 0.033 uF, 10% 16 V X5R 0402 ceramic AVX 0402YD333KAT2A 5 22 C19, C23, C24, C25, C26, C27, C28, C29, C30, C31, C32, C57, C58, C60, C62, C63, C66, C67, C68, C69, C82, C83 0.
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Parts List Item Qty Reference Designator Part Part Number Note 23 5 J29, J30, J32, J33, J34 NU HDR Not used (header 3 pos, 0.100 ctr) J29, J34 pin 1−3 shorted 23a 2 MP4 Jumper wire, 00.1” long 3M/ESD 923345−01−C To short pin 1 and 3 of J29, J34 24 3 J31, J35, J36 HDR2 Header 2 pos, 0.1 ctr 25 1 L1 Inductor chip 20.
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Parts List Item Qty Reference Designator Part Part Number 45 1 TP2 T point PC BLK Keystone Elec 5011 45a 1 TP1 T point PC WHT Keystone Elec 5012 46 1 U1 CDC7005ZVA Texas Instruments CDC7005ZVAT 47 1 U4 SN74LV125 Texas Instruments SN74LV125AD 48 1 U5 OPA341 Texas Instruments OPA341UA 49 1 VCXO1 VCXO_6 Toyocom VCXO 50 4 MP3 Stand off Legs for PCB 51 4 MP2 Screw Legs for PCB 6.2 Board Layout Figure 6−1.
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Parts List Figure 6−2.
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Parts List Figure 6−3.
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Parts List Figure 6−4.
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Parts List Figure 6−5. Power Layer View 6.3 Schematic The following page contains the schematic for the CDC7005.
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A B 1 1 GND P2 1 1 PWR_IN P1 2 SMA 5 R65 1.5K D4 GREEN 10n C60 VCXO_INB_EXT1 2 CLK_SENSE R55 NU GND + C14 47u 2 2 10n 1 R50 2 100K V CHECK J35 VCC C35100n 1 2 22u GND 22u + C15 GND + C78 AVCC VCC R49 2 160 C59 1 2 0 ohm 1 J21 2 3 GND VCC C53 . 1uF 1 GND .