Datasheet

DVcc AVcc
Test/SBWTCK TDO TDI TMS TCK RST/NMI/SBWTDIO
VBUS_4v3
VBUS_4v3
1.8V_Vdd_MSP
1.8V_Vdd_MSP
1.8V_Vdd_MSP
1.8V_Vdd_MSP
1.8V_Vdd_MSP
VBUS_4v3
ADC_0 ADC_1
MCLK_REQ
REQ1 REQ4 REQ3 REQ2 MSP_EN_Adj RESET
SDAH SCLH
I2C
USBConnection
withESDprotection
measurementfor
Vdd_ANA&Vadj
DNP
C7
470n
C7
470n
C74 220nFC74 220nF
SW2
SWPUSHBUTTON
SW2
SWPUSHBUTTON
C45 15PFC45 15PF
D1
LL103A
D1
LL103A
R6
5.6K
R6
5.6K
C78
4u7
C78
4u7
R121 22RR121 22R
C9 15PFC9 15PF
C47
10PF
C47
10PF
C16
100nF
C16
100nF
C13
10nF
C13
10nF
R1 33R1 33
C4 100nFC4 100nF
R5
5.6K
R5
5.6K
R122 22RR122 22R
J7J7
1
2
R8
100K
R8
100K
R2 33R2 33
C10
2.2nFDNP
C10
2.2nFDNP
C1
10PF
C1
10PF
C5
100nF
C5
100nF
C2
10PF
C2
10PF
C12
10nF
C12
10nF
U3
MSP430F5529
U3
MSP430F5529
P5.0/VREF+/VeREF+
9
P5.1/VREF-/VeREF-
10
AVcc1
11
P5.4/XIN
12
P5.5/XOUT
13
AVss1
14
DVcc1
18
DVss1
19
Vcore
20
P2.7/UCB0STE/UCA0CLK
36
DVss2
49
DVcc2
50
P3.0/UCB0SIMO/UCB0SDA
37
P3.1/UCB0SOMI/UCB0SCL
38
P3.2/UCB0CLK/UCA0STE
39
P3.3/UCA0TXD/UCA0SIMO
40
P3.4/UCA0RXD/UCA0SOMI
41
P4.0/PM_UCB1STE/PM_UCA1CLK
45
P4.1/PM_UCB1SIMO/PM_UCB1SDA
46
P4.2/PM_UCB1SOMI/PM_UCB1SCL
47
P4.3/PM_UCB1CLK/PM_UCA1STE
48
P4.4/PM_UCA1TXD/PM_UCA1SIMO
51
P4.5/PM_UCA1RXD/PM_UCA1SOMI
52
P4.6/PM_NONE
53
P4.7/PM_NONE
54
P6.4/CB4/A4
1
P6.5/CB5/A5
2
P6.6/CB6/A6
3
P6.7/CB7/A7
4
P7.0/CB8/A12
5
P7.1/CB9/A13
6
P7.2/CB10/A14
7
P7.3/CB11/A15
8
VSSU
61
PU.0/DP
62
PUR
63
PU.1/DM
64
VBUS
65
VUSB
66
V18
67
AVss2
68
P5.2/XT2IN
69
P5.3/XT2OUT
70
TEST/SBWTCK
71
PJ.0/TDO
72
PJ.1/TDI/TCLK
73
PJ.2/TMS
74
PJ.3/TCK
75
!RST/NMI/SBWTDIO
76
P1.0/TA0CLK/ACLK
21
P1.1/TA0.0
22
P1.2/TA0.1
23
P1.3/TA0.2
24
P1.4/TA0.3
25
P1.5/TA0.4
26
P1.6/TA1CLK/CBOUT
27
P1.7/TA1.0
28
P2.6/RTCCLT/DMAE0
35
P8.0
15
P8.1
16
P8.2
17
P2.0/TA1.1
29
P2.1/TA1.2
30
P2.3/TA2.0
32
P2.4/TA2.1
33
P2.5/TA2.2
34
P2.2/TA2CLK/SMCLK
31
P3.5/TB0.5
42
P3.6/TB0.6
43
P3.7/TB0OUT/SVMOUT
44
P5.6/TB0.0
55
P5.7/TB0.1
56
P7.4/TB0.2
57
P7.5/TB0.3
58
P7.6/TB0.4
59
P7.7/TB0CLK/MCLK
60
P6.3/CB3/A3
80
P6.2/CB2/A2
79
P6.1/CB1/A1
78
P6.0/CB0/A0
77
R117 22RR117 22R
J12J12
1
2
R7
1.0M
R7
1.0M
R118 22RR118 22R
J70 JTAG J70 JTAG
1 2 3 4 5 6
J11J11
1
2
R3 1k4R3 1k4
+
C15
10uF
+
C15
10uF
J72
HEADER1
J72
HEADER1
1
C79
4u7
C79
4u7
C3 220nFC3 220nF
C46
10PF
C46
10PF
SW3
SWPUSHB
SW3
SWPUSHB
R119 22RR119 22R
U7
TPD2E001DZD
U7
TPD2E001DZD
GND
1
IO1
2
IO2
3
Vcc
4
R108
0R0
R108
0R0
USB1
USB_MINI-B
USB1
USB_MINI-B
VBUS
1
D-
2
D+
3
IO
4
GND
5
Shield1
GND1
Shield2
GND2
Shield3
GND3
Shield4
GND4
C6
100nF
C6
100nF
+
C11
10uF
+
C11
10uF
C32
15pF
C32
15pF
C43
10PF
C43
10PF
Y1
4MHz
Y1
4MHz
R120 22RR120 22R
R105
33k
R105
33k
C31
15pF
C31
15pF
C14
10000PF
C14
10000PF
R9
47K
R9
47K
www.ti.com Schematic
Figure 3. Schematic – (2 of 3)
7
SCAU040–March 2010 Quad Sine-Wave Clock Buffer Evaluation Board
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