Datasheet

2
Functional Diagram
GND = 8
V
CC
= 16
Q
2
6
7
Q
3
Q
1
5
Q
0
4
14
13
12
11
Q
4
Q
5
Q
6
Q
7
THREE-
OUTPUT
8-BIT
STORAGE
REGISTER
8-STAGE
SHIFT
REGISTER
OE
15
1
3
2
10
9
QS
2
QS
1
DATA
CP
STROBE
STATE
TRUTH TABLE
INPUTS PARALLEL OUTPUTS SERIAL OUTPUTS
CP OE STR D Q
0
Q
n
QS
1
(NOTE 4) QS
2
↑ L X X Z Z Q’6 NC
↓ LXXZZNCQ
7
↑H L X NC NC Q’6 NC
↑ HHLLQ
n
-1 Q’6 NC
↑ HHHHQ
n
-1 Q’6 NC
↓ H H H NCNCNCQ
7
NOTES:
3. H = High Voltage Level, L = Low Voltage Level, X = Don’t Care, NC = No charge, Z = High Impedance Off-state,
↑ = Transition from Low to High Level, ↓ = Transition from High to Low.
4. At the positive clock edge the information in the seventh register stage is transferred to the 8th register stage and QS
1
output.
CD74HC4094, CD74HCT4094