Datasheet

5
point the voltage on C2 remains constant as the PC2 output
is in three-state and the VCO input at pin 9 is a high imped-
ance. Also in this condition, the signal at the phase compara-
tor pulse output (PCP
OUT
) is a HIGH level and so can be
used for indicating a locked condition.
Thus, for PC2, no phase difference exists between SIG
IN
and COMP
IN
over the full frequency range of the VCO.
Moreover, the power dissipation due to the low-pass filter is
reduced because both p- and n-type drivers are “OFF” for
most of the signal input cycle. It should be noted that the
PLL lock range for this type of phase comparator is equal to
the capture range and is independent of the low-pass filter.
With no signal present at SIG
IN
, the VCO adjusts, via PC2,
to its lowest frequency.
Phase Comparator 3 (PC3)
This is a positive edge-triggered sequential phase detec-
tor using an RS-type flip-flop. When the PLL is using this
comparator, the loop is controlled by positive signal transi-
tions and the duty factors of SIG
IN
and COMP
IN
are not
important. The transfer characteristic of PC3, assuming
ripple (f
r
= f
i
) is suppressed, is:
V
DEMOUT
= (V
CC
/2p) (fSIG
IN
- fCOMP
IN
) where V
DE-
MOUT
is the demodulator output at pin 10; V
DEMOUT
=
V
PC3OUT
(via low-pass filter).
The average output from PC3, fed to the VCO via the low-
pass filter and seen at the demodulator at pin 10 (V
DE-
MOUT
), is the resultant of the phase differences of SIG
IN
and COMP
IN
as shown in Figure 6. Typical waveforms for
the PC3 loop locked at f
o
are shown in Figure 7.
The phase-to-output response characteristic of PC3 (Figure
6) differs from that of PC2 in that the phase angle between
SIG
IN
and COMP
IN
varies between 0
o
and 360
o
and is 180
o
at the center frequency. Also PC3 gives a greater voltage
swing than PC2 for input phase differences but as a conse-
quence the ripple content of the VCO input signal is higher.
With no signal present at SIG
IN
, the VCO adjusts, via PC3,
to its highest frequency.
The only difference between the HC and HCT versions is the
input level specification of the INH input. This input disables
the VCO section. The comparator’s sections are identical, so
that there is no difference in the SIG
IN
(pin 14) or COMP
IN
(pin 3) inputs between the HC and the HCT versions.
FIGURE 6. PHASE COMPARATOR 3: AVERAGE OUTPUT
VOLTAGE vs INPUT PHASE DIFFERENCE:
V
DEMOUT
= V
PC3OUT
= (V
CC
/2π) (φSIG
IN
- φCOM-
P
IN
); φ
DEMOUT
= (φSIG
IN
- φCOMP
IN
)
V
CC
V
DEMOUT (AV)
1/2 V
CC
0
0
o
180
o
φ
DEMOUT
360
o
FIGURE 7. TYPICAL WAVEFORMS FOR PLL USING PHASE
COMPARATOR 3, LOOP LOCKED AT f
o
SIG
IN
COMP
IN
VCO
OUT
PC3
OUT
VCO
IN
V
CC
GND
CD74HC4046A, CD74HCT4046A