Datasheet

7
HCT TYPES
Propagation Delay
An to any Y or Y
Address to Output
t
PLH
, t
PHL
C
L
= 50pF 4.5 - - 38 - 48 - 57 ns
t
PLH
, t
PHL
C
L
= 15pF 5 - 16 - - - - - ns
OE
0
to any Y (HC137) t
PLH
, t
PHL
C
L
= 50pF 4.5 - - 35 - 44 - 53 ns
OE
0
to any Y (HC237) t
PLH
, t
PHL
C
L
= 50pF 4.5 - - 33 - 41 - 60 ns
OE
1
to any Y (HC137) t
TLH
, t
THL
C
L
= 50pF 4.5 - - 37 - 46 - 56 ns
OE
1
to any Y (HC237) t
TLH
, t
THL
C
L
= 50pF 4.5 - - 35 - 44 - 53 ns
LE to any Y (HC137) t
TLH
, t
THL
CL = 50pF 4.5 - - 44 - 55 - 66 ns
LE to any Y (HC237) t
TLH
, t
THL
C
L
= 50pF 4.5 - - 42 - 53 - 63 ns
Power Dissipation
Capacitance, (Notes 3, 4)
CD74HC137 C
PD
C
L
= 15pF 5 - 19 - - - - - pF
’HC237 C
PD
C
L
= 15pF 5 - 23 - - - - - pF
Output Transition Time t
TLH
, t
THL
C
L
= 50pF 4.5 15 19 22 ns
Input Capacitance C
I
- - - - 10 - 10 - 10 pF
NOTES:
3. C
PD
is used to determine the dynamic power consumption, per gate.
4. P
D
= V
CC
2
f
i
(C
PD
+ C
L
) where: f
i
= Input Frequency, C
L
= Output Load Capacitance, V
CC
= Supply Voltage.
Switching Specifications Input t
r
, t
f
= 6ns (Continued)
PARAMETER SYMBOL
TEST
CONDITIONS V
CC
(V)
25
o
C
-40
o
C TO
85
o
C -55
o
C TO 125
o
C
UNITSMIN TYP MAX MIN MAX MIN MAX
Test Circuits and Waveforms
NOTE: Outputs should be switching from 10% V
CC
to 90% V
CC
in
accordance with device truth table. For f
MAX
, input duty cycle = 50%.
FIGURE 1. HC CLOCK PULSE RISE AND FALL TIMES AND
PULSE WIDTH
NOTE: Outputs should be switching from 10% V
CC
to 90% V
CC
in
accordance with device truth table. For f
MAX
, input duty cycle = 50%.
FIGURE 2. HCT CLOCK PULSE RISE AND FALL TIMES AND
PULSE WIDTH
FIGURE 3. HC AND HCU TRANSITION TIMES AND PROPAGA-
TION DELAY TIMES, COMBINATION LOGIC
FIGURE 4. HCT TRANSITION TIMES AND PROPAGATION
DELAY TIMES, COMBINATION LOGIC
CLOCK
90%
50%
10%
GND
V
CC
t
r
C
L
t
f
C
L
50%
50%
t
WL
t
WH
10%
t
WL
+ t
WH
=
fC
L
I
CLOCK
2.7V
1.3V
0.3V
GND
3V
t
r
C
L
= 6ns
t
f
C
L
= 6ns
1.3V
1.3V
t
WL
t
WH
0.3V
t
WL
+ t
WH
=
fC
L
I
t
PHL
t
PLH
t
THL
t
TLH
90%
50%
10%
50%
10%
INVERTING
OUTPUT
INPUT
GND
V
CC
t
r
= 6ns t
f
= 6ns
90%
t
PHL
t
PLH
t
THL
t
TLH
2.7V
1.3V
0.3V
1.3V
10%
INVERTING
OUTPUT
INPUT
GND
3V
t
r
= 6ns
t
f
= 6ns
90%
CD74HC137, CD74HCT137, CD54HC237, CD74HC237, CD74HCT237