Datasheet

− 5 −
HCT TYPES
High Level Input
Voltage
V
IH
−−4.5 to
5.5
2 −−2 − 2 − V
Low Level Input
Voltage
V
IL
−−4.5 to
5.5
−−0.8 − 0.8 − 0.8 V
High Level Output
Voltage
CMOS Loads
V
OH
V
IH
or V
IL
−0.02 4.5 4.4 −−4.4 − 4.4 − V
High Level Output
Voltage
TTL Loads
−4 4.5 3.98 −−3.84 − 3.7 − V
Low Level Output
Voltage
CMOS Loads
V
OL
V
IH
or V
IL
0.02 4.5 −−0.1 − 0.1 − 0.1 V
Low Level Output
Voltage
TTL Loads
4 4.5 −−0.26 − 0.33 − 0.4 V
Input Leakage
Current
I
I
V
CC
and
GND
0 5.5 −−
±
0.1 −
±
1 −
±
1
μ
A
Quiescent Device
Current
I
CC
V
CC
or
GND
0 5.5 −−8 − 80 − 160
μ
A
Additional Quiescent
Device Current Per
Input Pin: 1 Unit Load
Δ
I
CC
(Note 3)
V
CC
−2.1
− 4.5 to
5.5
− 100 360 − 450 − 490
μ
A
NOTE:
3. For dual−supply systems theoretical worst case (V
I
= 2.4V, V
CC
= 5.5V) specification is 1.8mA.
DC Electrical Speci cations (Continued)
PARAMETER SYMBOL
TEST
CONDITIONS
V
CC
(V)
25
o
C −40
o
C TO 85
o
C −55
o
C TO 125
o
C
UNITSV
I
(V) I
O
(mA) MIN TYP MAX MIN MAX MIN MAX
HCT Input Loading Table
INPUT UNIT LOADS
D 0.4
CP, OE 1.5
STR 1.0
NOTE: Unit Load is
Δ
I
CC
limit speci ed in DC Electrical Table, e.g.,
360
μ
A max at 25
o
C.
Prerequisite for Switching Speci cations
CHARACTERISTIC SYMBOL V
CC
(V)
25
o
C −40
o
C TO 85
o
C −55
o
C TO 125
o
C
UNITSMIN MAX MIN MAX MIN MAX
HC TYPES
CP Pulse Width t
W
280− 100 − 120 − ns
4.5 16 − 20 − 24 − ns
614− 17 − 20 − ns
STR Pulse Width t
WH
280− 100 − 120 − ns
4.5 16 − 20 − 24 − ns
614− 17 − 20 − ns
CD54HC4094, CD74HC4094, CD74HCT4094