Datasheet

4
HCT TYPES
High Level Input
Voltage
V
IH
- - 4.5 to
5.5
2--2 - 2 - V
Low Level Input
Voltage
V
IL
- - 4.5 to
5.5
- - 0.8 - 0.8 - 0.8 V
High Level Output
Voltage
CMOS Loads
V
OH
V
IH
or V
IL
-0.02 4.5 4.4 - - 4.4 - 4.4 - V
High Level Output
Voltage
TTL Loads
-4 4.5 3.98 - - 3.84 - 3.7 - V
Low Level Output
Voltage
CMOS Loads
V
OL
V
IH
or V
IL
0.02 4.5 - - 0.1 - 0.1 - 0.1 V
Low Level Output
Voltage
TTL Loads
4 4.5 - - 0.26 - 0.33 - 0.4 V
Input Leakage
Current
I
I
V
CC
and
GND
0 5.5 - - ±0.1 - ±1-±1 µA
Quiescent Device
Current
I
CC
V
CC
or
GND
0 5.5 - - 8 - 80 - 160 µA
Additional Quiescent
Device Current Per
Input Pin: 1 Unit Load
∆I
CC
(Note 2)
V
CC
-2.1
- 4.5 to
5.5
- 100 360 - 450 - 490 µA
NOTE:
2. For dual-supply systems theoretical worst case (V
I
= 2.4V, V
CC
= 5.5V) specification is 1.8mA.
DC Electrical Specifications (Continued)
PARAMETER SYMBOL
TEST
CONDITIONS
V
CC
(V)
25
o
C -40
o
C TO 85
o
C -55
o
C TO 125
o
C
UNITSV
I
(V) I
O
(mA) MIN TYP MAX MIN MAX MIN MAX
HCT Input Loading Table
INPUT UNIT LOADS (NOTE)
P0-P7 0.20
TE, MR 0.40
CP 0.60
PE 0.80
PL 1.35
NOTE: Unit Load is ∆I
CC
limit specified in DC Electrical Table, e.g.,
360µA max at 25
o
C.
Prerequisite for Switching Specifications
PARAMETER SYMBOL V
CC
(V)
25
o
C -40
o
C TO 85
o
C -55
o
C TO 125
o
C
UNITSMIN TYP MAX MIN MAX MIN MAX
HC TYPES
CP Pulse Width t
W
2 165 - - 205 - 250 - ns
4.5 33 - - 41 - 50 - ns
628- -35-43-ns
PL Pulse Width t
W
2 125 - - 155 - 190 - ns
4.5 25 - - 31 - 38 - ns
621- -26-32-ns
CD54HC40103, CD74HC40103, CD74HCT40103