Datasheet

2
Functional Diagram
TRUTH TABLE
INPUTS OUTPUT
RESET (MR) CLOCK CP DATA D
n
Q
LXXL
H ↑ HH
H ↑ LL
HLXQ
0
H = High Voltage Level, L = Low Voltage Level, X = Don’t Care, ↑ = Transition from Low to
High Level, Q
0
= Level Before the Indicated Steady-State Input Conditions Were Established.
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
RESET MR
D0
D1
D2
D3
D4
D5
D6
D7
CLOCK
CP
DATA
INPUTS
DATA
OUTPUTS
CD54/74HC273, CD54/74HCT273