Datasheet

4
Quiescent Device
Current
I
CC
V
CC
or
GND
0 6 - - 8 - 80 - 160 µA
Three-State Leakage
Current
I
OZ
V
IL
or
V
IH
-6--±0.5 - ±5-±10 µA
HCT TYPES
High Level Input
Voltage
V
IH
- - 4.5 to
5.5
2-- 2 - 2 - V
Low Level Input
Voltage
V
IL
- - 4.5 to
5.5
- - 0.8 - 0.8 - 0.8 V
High Level Output
Voltage
CMOS Loads
V
OH
V
IH
or
V
IL
-0.02 4.5 4.4 - - 4.4 - 4.4 - V
High Level Output
Voltage
TTL Loads
-6 4.5 3.98 - - 3.84 - 3.7 - V
Low Level Output
Voltage
CMOS Loads
V
OL
V
IH
or
V
IL
0.02 4.5 - - 0.1 - 0.1 - 0.1 V
Low Level Output
Voltage
TTL Loads
6 4.5 - - 0.26 - 0.33 - 0.4 V
Input Leakage
Current
I
I
V
CC
to
GND
0 5.5 - - ±0.1 - ±1-±1 µA
Quiescent Device
Current
I
CC
V
CC
or
GND
0 5.5 - - 8 - 80 - 160 µA
Additional Quiescent
Device Current Per
Input Pin: 1 Unit Load
∆I
CC
(Note 2)
V
CC
-2.1
- 4.5 to
5.5
- 100 360 - 450 - 490 µA
Three-State Leakage
Current
I
OZ
V
IL
or
V
IH
- 5.5 - - ±0.5 - ±5-±10 µA
NOTE:
2. For dual-supply systems theoretical worst case (V
I
= 2.4V, V
CC
= 5.5V) specification is 1.8mA.
DC Electrical Specifications (Continued)
PARAMETER SYMBOL
TEST
CONDITIONS
V
CC
(V)
25
o
C -40
o
C TO 85
o
C -55
o
C TO 125
o
C
UNITSV
I
(V) I
O
(mA) MIN TYP MAX MIN MAX MIN MAX
HCT Input Loading Table
INPUT UNIT LOADS
Data 0.95
S3
OE 0.6
NOTE: Unit Load is ∆I
CC
limit specified in DC Electrical
Specifications table, e.g., 360µA max at 25
o
C.
CD54HC257, CD74HC257, CD54HCT257, CD74HCT257