Datasheet

6
Set-up Time
S1, S0 to Clock (Figure 4)
t
SU
- 4.5 20 - 25 - 30 - ns
Set-up Time
DSL, DSR to Clock (Figure 4)
t
SU
- 4.5 14 - 18 - 21 - ns
Hold Time
S1, S0 to Clock (Figure 4)
t
H
- 4.50-0-0-ns
Hold Time
Data to Clock (Figure 3)
t
H
- 4.50-0-0-ns
Switching Specifications Input t
r
, t
f
= 6ns
PARAMETER SYMBOL
TEST
CONDITIONS
V
CC
(V)
25
o
C -40
o
C TO 85
o
C -55
o
C TO 125
o
C
UNITSTYP MAX MAX MAX
HC TYPES
Propagation Delay,
Clock to Output (Figure 1)
t
PLH
, t
PHL
C
L
= 50pF 2 - 175 220 265 ns
4.5 - 35 44 53 ns
6 - 30 37 45 ns
Propagation Delay,
Clock to Q
t
PLH
, t
PHL
- 5 14 - - - ns
Output Transition Time
(Figure 1)
t
TLH
, t
THL
C
L
= 50pF 2 - 75 95 110 ns
4.5 - 15 19 22 ns
6 - 13 16 19 ns
Propagation Delay,
MR to Output (Figure 2)
t
PHL
C
L
= 50pF 2 - 140 175 210 ns
4.5 - 28 35 42 ns
6 - 24 30 36 ns
Input Capacitance C
IN
---1010 10pF
Maximum Clock Frequency f
MAX
- 5 60 - - - MHz
Power Dissipation
Capacitance (Notes 4, 5)
C
PD
- 5 55 - - - pF
HCT TYPES
Propagation Delay,
Clock to Output (Figure 1)
t
PLH
, t
PHL
C
L
= 50pF 4.5 - 37 46 56 ns
Propagation Delay,
Clock to Q
t
PLH
, t
PHL
- 5 15 - - - ns
Output Transition Times
(Figure 1)
t
TLH
, t
THL
C
L
= 50pF 4.5 - 15 19 22 ns
Propagation Delay,
MR to Output (Figure 2)
t
PHL
C
L
= 50pF 4.5 - 40 50 60 ns
Input Capacitance C
IN
---1010 10pF
Maximum Clock Frequency f
MAX
- 5 50 - - - MHz
Power Dissipation
Capacitance (Notes 4, 5)
C
PD
- 5 60 - - - pF
NOTES:
3. C
PD
is used to determine the dynamic power consumption, per gate.
4. P
D
= V
CC
2
f
i
+ ∑ (C
L
V
CC
2
) where f
i
= Input Frequency, C
L
= Output Load Capacitance, V
CC
= Supply Voltage.
Prerequisite For Switching Function (Continued)
PARAMETER SYMBOL
TEST
CONDITIONS V
CC
(V)
25
o
C -40
o
C TO 85
o
C -55
o
C TO 125
o
C
UNITSMIN MAX MIN MAX MIN MAX