Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsLogic ICsLogic IC - Counter Binary counter 74ACT Positive slope 80 MHz PDIP 16

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CD54ACT161, CD74ACT161

4-BIT SYNCHRONOUS BINARY COUNTERS

SCHS298B – APRIL 2000 – REVISED MARCH 2003

5

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

typical clear, preset, count, and inhibit sequence

The following sequence is illustrated below:

1. Clear outputs to zero (asynchronous)

2. Preset to binary 12

3. Count to 13, 14, 15, 0, 1, and 2

4. Inhibit

Data

Inputs

Data

Outputs

CLR

LOAD

A

B

C

D

CLK

ENP

ENT

RCO

Q

A

Q

B

Q

C

Q

D

Async

Clear

Preset

Count Inhibit

12 13

14 15 0 1 2