Datasheet

6
Three-State Output
Capacitance
C
O
Input Capacitance C
I
- - -10- -10pF
Power Dissipation Capacitance C
PD
(Note 11)
- - 45 - - 45 - pF
NOTES:
8. Limits tested 100%.
9. 3.3V Min is at 3.6V, Max is at 3V.
10. 5V Min is at 5.5V, Max is at 4.5V.
11. C
PD
is used to determine the dynamic power consumption per device.
P
D
= V
CC
2
f
i
(C
PD
+ C
L
) where f
i
= input frequency, C
L
= output load capacitance, V
CC
= supply voltage.
Switching Specifications Input t
r
, t
f
= 3ns, C
L
= 50pF (Worst Case) (Continued)
PARAMETER SYMBOL V
CC
(V)
-40
o
C TO 85
o
C -55
o
C TO 125
o
C
UNITSMIN TYP MAX MIN TYP MAX
FIGURE 1. THREE-STATE PROPAGATION DELAY WAVEFORMS AND TEST CIRCUIT
FIGURE 2. PROPAGATION DELAY TIMES
DUT
WITH
THREE-
STATE
OUTPUT
INPUT LEVEL
90%
V
S
10%
GND
t
f
= 3ns
t
PZL
t
PZH
t
PLZ
t
PHZ
OUTPUTS
ENABLED
OUTPUTS
DISABLED
OUTPUT: LOW
TO OFF TO LOW
OUTPUT: HIGH
TO OFF TO HIGH
OTHER
INPUTS
(TIED HIGH
OR LOW)
OUTPUT
DISABLE
C
L
50pF
500Ω
†
R
L
500Ω†
R
L
OUT
V
S
0.2V
CC
V
OL
(≠ GND)
V
OH
(≠ V
CC
)
0.8 V
CC
V
S
GND (t
PHZ,
t
PZH
)
OUTPUTS
ENABLED
OPEN (t
PHL,
t
PLH
)
2 V
CC
(t
PLZ,
t
PZL
)
(OPEN DRAIN)
t
r
= 3ns
OUTPUT
DISABLE
†FOR AC SERIES ONLY: WHEN V
CC
= 1.5V, R
L
= 1kΩ
INPUT LEVEL
t
r
= 3ns t
f
= 3ns
90%
I
N
V
S
10%
V
S
V
S
t
PHL
t
PHL
t
PLH
INVERTING
OUTPUT
Y
NON-INVERTING
OUTPUT Y
t
PLH
CD74AC251, CD74ACT251