Datasheet

CD54AC161, CD74AC161
4-BIT SYNCHRONOUS BINARY COUNTERS
SCHS239C – SEPTEMBER 1998 – REVISED MARCH 2003
8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
timing requirements over recommended operating free-air temperature range (unless otherwise
noted)
V
CC
–55°C to
125°C
–40°C to
85°C
UNIT
CC
MIN MAX MIN MAX
1.5 V 7 8
f
clock
Clock frequency
3.3 V ± 0.3 V
64 73
MHz
5 V ± 0.5 V 90 103
1.5 V 69 61
CLK high or low
3.3 V ± 0.3 V 7.7 6.8
t
Pulse duration
5 V ± 0.5 V 5.5 4.8
ns
t
w
Pulse
duration
1.5 V 63 55
ns
CLR low
3.3 V ± 0.3 V 7 6.1
5 V ± 0.5 V 5 4.4
↑
1.5 V 63 55
↑
A, B, C, or D
3.3 V ± 0.3 V 7 6.1
t
Setu
p
time before CLK↑
5 V ± 0.5 V 5 4.4
ns
t
su
Setup
time
,
before
CLK↑
1.5 V 75 66
ns
LOAD
3.3 V ± 0.3 V 8.4 7.4
5 V ± 0.5 V 6 5.3
↑
1.5 V 0 0
↑
A, B, C, or D
3.3 V ± 0.3 V 0 0
t
h
Hold time after CLK↑
5 V ± 0.5 V 0 0
ns
t
h
Hold
time
,
after
CLK↑
1.5 V 0 0
ns
ENP or ENT
3.3 V ± 0.3 V 0 0
5 V ± 0.5 V 0 0
↑ ↑
1.5 V 75 66
t
rec
Recovery time, CLR
↑
before CLK
↑
3.3 V ± 0.3 V 8.4 7.4
ns
5 V ± 0.5 V 6 5.3