Datasheet

MOTOROLA CMOS LOGIC DATAMC14541B
4
EXPANDED BLOCK DIAGRAM
A 12
B 13
R
tc
1
C
tc
2
R
S
3
5
AUTO RESET
OSC
RESET
C
2
8
8–STAGE
COUNTER
RESET
POWER–ON
RESET
6
MASTER RESET
2
10
2
13
2
16
C
8–STAGE
COUNTER
RESET
1 OF 4
MUX
10
MODE
9
Q/Q
SELECT
8 Q
V
DD
= PIN 14
V
SS
= PIN 7
FREQUENCY SELECTION TABLE
A B
Number of
Counter Stages
n
Count
2
n
0 0 13 8192
0 1 10 1024
1 0 8 256
1 1 16 65536
TRUTH TABLE
Pin
State
Pin
0 1
Auto Reset, 5 Auto Reset Operating Auto Reset Disabled
Master Reset, 6 Timer Operational Master Reset On
Q/Q, 9 Output Initially Low
After Reset
Output Initially High
After Reset
Mode, 10 Single Cycle Mode Recycle Mode
Figure 3. Oscillator Circuit Using RC Configuration
3
R
S
R
TC
C
tc
2 1
TO CLOCK
CIRCUIT
INTERNAL
RESET