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123456
MOTOROLA CMOS LOGIC DATAMC14512B
370
The MC14512B is an 8–channel data selector constructed with MOS
P–channel and N–channel enhancement mode devices in a single
monolithic structure. This data selector finds primary application in signal
multiplexing functions. It may also be used for data routing, digital signal
switching, signal gating, and number sequence generation.
• Diode Protection on All Inputs
• Single Supply Operation
• 3–State Output (Logic “1”, Logic “0”, High Impedance)
• Supply Voltage Range = 3.0 Vdc to 18 Vdc
• Capable of Driving Two Low–power TTL Loads or One Low–power
Schottky TTL Load Over the Rated Temperature Range
MAXIMUM RATINGS* (Voltages Referenced to V
SS
)
Symbol
Parameter Value Unit
V
DD
DC Supply Voltage – 0.5 to + 18.0 V
V
in
, V
out
Input or Output Voltage (DC or Transient) – 0.5 to V
DD
+ 0.5 V
I
in
, I
out
Input or Output Current (DC or Transient),
per Pin
± 10 mA
P
D
Power Dissipation, per Package† 500 mW
T
stg
Storage Temperature – 65 to + 150
C
T
L
Lead Temperature (8–Second Soldering) 260
C
* Maximum Ratings are those values beyond which damage to the device may occur.
†Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/ C From 65 C To 125 C
Ceramic “L” Packages: – 12 mW/ C From 100 C To 125 C
TRUTH TABLE
C B A Inhibit Disable Z
0 0 0 0 0 X0
0 0 1 0 0 X1
0 1 0 0 0 X2
0 1 1 0 0 X3
1 0 0 0 0 X4
1 0 1 0 0 X5
1 1 0 0 0 X6
1 1 1 0 0 X7
X X X 1 0 0
X X X X 1 High
Impedance
X = Don’t Care
SEMICONDUCTOR TECHNICAL DATA
Motorola, Inc. 1995
REV 3
1/94
L SUFFIX
CERAMIC
CASE 620
ORDERING INFORMATION
MC14XXXBCP Plastic
MC14XXXBCL Ceramic
MC14XXXBD SOIC
T
A
= – 55° to 125°C for all packages.
P SUFFIX
PLASTIC
CASE 648
D SUFFIX
SOIC
CASE 751B
PIN ASSIGNMENT
This device contains protection circuitry to
guard against damage due to high static
voltages or electric fields. However, pre-
cautions must be taken to avoid applications of
any voltage higher than maximum rated volt-
ages to this high–impedance circuit. For proper
operation, V
in
and V
out
should be constrained
to the range V
SS
(V
in
or V
out
) V
DD
.
Unused inputs must always be tied to an
appropriate logic voltage level (e.g., either V
SS
or V
DD
). Unused outputs must be left open.
13
14
15
16
9
10
11
125
4
3
2
1
8
7
6
B
C
Z
DIS
V
DD
X7
INH
A
X3
X2
X1
X0
V
SS
X6
X5
X4

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