Datasheet

2
Pinouts
CD4051B (PDIP, CDIP, SOIC, SOP, TSSOP)
TOP VIEW
CD4052B (PDIP, CDIP, SOP, TSSOP)
TOP VIEW
CD4053B (PDIP, CDIP, SOP, TSSOP)
TOP VIEW
14
15
16
9
13
12
11
10
1
2
3
4
5
7
6
8
4
6
COM OUT/IN
7
5
INH
V
SS
V
EE
V
DD
1
0
3
A
B
C
2
CHANNELS IN/OU
T
CHANNELS
IN/OUT
CHANNELS
IN/OUT
14
15
16
9
13
12
11
10
1
2
3
4
5
7
6
8
0
2
COMMON “Y” OUT/IN
3
1
INH
V
SS
V
EE
V
DD
1
COMMON “X” OUT/IN
0
3
A
B
2
Y CHANNELS
IN/OUT
Y CHANNELS
IN/OUT
X CHANNELS
IN/OUT
X CHANNELS
IN/OUT
14
15
16
9
13
12
11
10
1
2
3
4
5
7
6
8
by
bx
cy
OUT/IN CX OR CY
IN/OUT CX
INH
V
SS
V
EE
V
DD
OUT/IN ax OR ay
ay
ax
A
B
C
OUT/IN bx OR by
IN/OUT
IN/OUT
Functional Block Diagrams
CD4051B
11
10
9
6
A †
B †
C †
INH †
134 2 5 1 12 15 14
TG
TG
TG
TG
TG
TG
TG
TG
3
COMMON
OUT/IN
01234567
BINARY
TO
1 OF 8
DECODER
WITH
INHIBIT
LOGIC
LEVEL
CONVERSION
8 7
V
SS
V
EE
16
V
DD
CHANNEL IN/OUT
†All inputs are protected by standard CMOS protection network.
CD4051B, CD4052B, CD4053B