Datasheet
7-1397
Specifications CD40175BMS
TABLE 8. BURN-IN AND IRRADIATION TEST CONNECTIONS
FUNCTION OPEN GROUND VDD 9V ± -0.5V
OSCILLATOR
50kHz 25kHz
Static Burn-In 1
(Note 1)
2, 3, 6, 7, 10, 11,
14, 15
1, 4, 5, 8, 9, 12, 13 16
Static Burn-In 2
(Note 1)
2, 3, 6, 7, 10, 11,
14, 15
8 1, 4, 5, 9, 12,
13, 16
Dynamic Burn-
In (Note 1)
- 8 1, 16 2, 3, 6, 7, 10, 11,
14, 15
9 4, 5, 12, 13
Irradiation
(Note 2)
2, 3, 6, 7, 10, 11,
14, 15
8 1, 4, 5, 9, 12,
13, 16
NOTES:
1. Each pin except VDD and GND will have a series resistor of 10K± 5%, VDD = 18V ± 0.5V
2. Each pin except VDD and GND will have a series resistor of 47K± 5%; Group E, Subgroup 2, sample size is 4 dice/wafer, 0 failures,
VDD = 10V ± 0.5V
Logic Diagram
FIGURE 1. 1 OF 4 FLIP-FLOPS
TRUTH TABLE FOR 1 OF 4 FLIP-FLOPS (Positive Logic)
INPUTS OUTPUTS
CLOCK DATA CLEAR Q Q
0101
1110
X1QQ
XX001
1 = High level
X = Don’t care
0 = Low level
CL
CL
CLR
*
1
CLK
*
9
CL
CL
CL
CL
p
n
p
n
CL
CL
*
ALL INPUTS ARE PROTECTED
BY CMOS PROTECTION
NETWORK
VDD
VSS
CL
CL
p
n
D
*
Q
Q
p
n