Datasheet
MOTOROLA CMOS LOGIC DATA
51
MC14014B MC14021B
The MC14014B and MC14021B 8–bit static shift registers are constructed
with MOS P–channel and N–channel enhancement mode devices in a single
monolithic structure. These shift registers find primary use in parallel–to–
serial data conversion, synchronous and asynchronous parallel input, serial
output data queueing; and other general purpose register applications
requiring low power and/or high noise immunity.
• Synchronous Parallel Input/Serial Output (MC14014B)
• Asynchronous Parallel Input/Serial Output (MC14021B)
• Synchronous Serial Input/Serial Output
• Full Static Operation
• “Q” Outputs from Sixth, Seventh, and Eighth Stages
• Double Diode Input Protection
• Supply Voltage Range = 3.0 Vdc to 18 Vdc
• Capable of Driving Two Low–power TTL Loads or One Low–power
Schottky TTL Load Over the Rated Temperature Range
• MC14014B Pin–for–Pin Replacement for CD4014B
• MC14021B Pin–for–Pin Replacement for CD4021B
MAXIMUM RATINGS* (Voltages Referenced to V
SS
)
Symbol Parameter Value Unit
V
DD
DC Supply Voltage – 0.5 to + 18.0 V
V
in
, V
out
Input or Output Voltage (DC or Transient) – 0.5 to V
DD
+ 0.5 V
l
in
, l
out
Input or Output Current (DC or Transient),
per Pin
± 10 mA
P
D
Power Dissipation, per Package† 500 mW
T
stg
Storage Temperature – 65 to + 150
C
T
L
Lead Temperature (8–Second Soldering) 260
C
* Maximum Ratings are those values beyond which damage to the device may occur.
†Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/ C From 65 C To 125 C
Ceramic “L” Packages: – 12 mW/ C From 100 C To 125 C
LOGIC DIAGRAM
CLOCK
D
S
P/S
P1 P2 P3 P6 P7 P8
7 6 5 14 15 1
10
11
9
D
C
Q D
C
Q D
C
Q D
C
Q D
C
Q D
CQ
Q Q
2 12 3
Q8Q7Q6
V
DD
= PIN 16
V
SS
= PIN 8
P4 = PIN 4
P5 = PIN 13
SEMICONDUCTOR TECHNICAL DATA
Motorola, Inc. 1995
REV 3
1/94
L SUFFIX
CERAMIC
CASE 620
ORDERING INFORMATION
MC14XXXBCP Plastic
MC14XXXBCL Ceramic
MC14XXXBD SOIC
T
A
= – 55° to 125°C for all packages.
P SUFFIX
PLASTIC
CASE 648
D SUFFIX
SOIC
CASE 751B
TRUTH TABLE
Q6 Q7 Q8
t Clock D
S
P/S t=n+6 t=n+7 t=n+8
n 0 0 0 ? ?
n+1 1 0 1 0 ?
n+2 0 0 0 1 0
n+3 1 0 1 0 1
X 0 Q6 Q7 Q8
SERIAL OPERATION:
Clock
MC14014B MC14021B D
S
P/S P
n
*Q
n
X X 1 0 0
X X 1 1 1
* Q6, Q7, & Q8 are available externally
PARALLEL OPERATION:
X = Don’t Care