Data Sheet
Table Of Contents
- 1 Module Overview
- Table of Contents
- 2 Revision History
- 3 Device Comparison
- 4 Terminal Configuration and Functions
- 5 Specifications
- 5.1 Absolute Maximum Ratings
- 5.2 ESD Ratings
- 5.3 Recommended Operating Conditions
- 5.4 Current Consumption Summary: 2.4 GHz RF Band
- 5.5 Current Consumption Summary: 5 GHz RF Band
- 5.6 TX Power Control for 2.4 GHz Band
- 5.7 TX Power Control for 5 GHz Band
- 5.8 Brownout and Blackout Conditions
- 5.9 Electrical Characteristics for DIO Pins
- 5.10 WLAN Receiver Characteristics
- 5.11 WLAN Transmitter Characteristics
- 5.12 BLE and WLAN Coexistence Requirements
- 5.13 Reset Requirement
- 5.14 Thermal Resistance Characteristics for MOB Package
- 5.15 Timing and Switching Characteristics
- 5.16 External Interfaces
- 6 Detailed Description
- 7 Applications, Implementation, and Layout
- 8 Environmental Requirements and SMT Specifications
- 9 Device and Documentation Support
- 10 Mechanical, Packaging, and Orderable Information
- Important Notice
TI Confidential – NDA Restrictions
ADVANCEINFORMATION
Copyright © 2019, Texas Instruments Incorporated Terminal Configuration and Functions
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CC3135MOD
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SWRS225A –FEBRUARY 2019–REVISED AUGUST 2019
Table 4-1. Pin Description and Attributes
PIN DEFAULT FUNCTION
DIGITAL I/O
STATE AT
RESET AND
HIBERNATE
I/O TYPE
(1)
CC3135 DEVICE PIN
NO.
DESCRIPTION
HOSTLESS
MODE
BLE COEX
CC_COEX_
OUT
CC_COEX_
IN
1 GND N/A N/A N/A – Power - GND
2 GND N/A N/A N/A – Power - GND
3 DIO10 Y Y Y – I/O 1 Digital input or output
4 nHIB - - - Hi-Z I 2
Hibernate signal input to the NWP subsystem
(active low). This is connected to the MCU GPIO.
If the GPIO from the MCU can float while the MCU
enters low power, consider adding a pullup resistor
on the board to avoid floating.
5 HOST_SPI_CLK - - - Hi-Z I 5 Host interface SPI clock
6 HOST_SPI_MOSI - - - Hi-Z I 6 Host interface SPI data input
7 HOST_SPI_MISO - - - Hi-Z O 7 Host interface SPI data output
8 HOST_SPI_nCS - - - Hi-Z I 8 Host interface SPI chip select (active low)
9 DIO12 Y Y Y – O 3 Digital input or output
10 DIO13 Y Y Y – – 4 Digital input or output
11 HOST_INTR - - - Hi-Z O 15 Interrupt output (active high)
12 DIO23 Y Y Y Hi-Z 16 Digital input or output
13 FLASH _SPI_MISO N/A N/A N/A Hi-Z I - External Serial Flash Programming: SPI data in
14 FLASH _SPI_CS N/A N/A N/A Hi-Z O -
External Serial Flash Programming: SPI chip select
(active low)
15 FLASH_SPI_CLK N/A N/A N/A Hi-Z O - External Serial Flash Programming: SPI clock
16 GND N/A N/A N/A – Power - Ground
17 FLASH_SPI_MOSI N/A N/A N/A Hi-Z O - External Serial Flash Programming: SPI data out
18 DIO24 Y Y Y Hi-Z 17 Digital input or output
19 DIO28 Y Y Y – – 18 Digital input or output
20 NC N/A N/A N/A – – - No Connect
21 Reserved - - - Hi-Z – - No Connect
22 DIO29 Y Y Y Hi-Z 20 Digital input or output
23 SOP2 Y
(2)
Y - Hi-Z O 21
A 100 kΩ pull down resistor is internally tied to this
SOP pin.
24 SOP1 N/A N/A N/A Hi-Z – 34
A 100 kΩ pull down resistor is internally tied to this
SOP pin. SOP[2:0] used for factory restore. See
Section 6.5.
25 GND N/A N/A N/A – Power - GND