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I/O Control Registers

11.11.1.5 CLK32KCTL Register (Offset = 10h) [reset = X]

CLK32KCTL is shown in Figure 11-7 and described in Table 11-9.

SCLK_LF External Output Control

Figure 11-7. CLK32KCTL Register

31 30 29 28 27 26 25 24

RESERVED

R-X

23 22 21 20 19 18 17 16

RESERVED

R-X

15 14 13 12 11 10 9 8

RESERVED

R-X

7 6 5 4 3 2 1 0

RESERVED OE_N

R-X R/W-1h

Table 11-9. CLK32KCTL Register Field Descriptions

Bit Field Type Reset Description

31-1 RESERVED R X

Software should not rely on the value of a reserved. Writing any

other value than the reset value may result in undefined behavior.

0 OE_N R/W 1h

0: Output enable active. SCLK_LF output on IO pin that has

PORT_ID (e.g. IOC:IOCFG0.PORT_ID) set to AON_CLK32K. 1:

Output enable not active

881

SWCU117A–February 2015–Revised March 2015 I/O Control

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