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I/O Control Registers

11.11.1.1 IOSTRMIN Register (Offset = 0h) [reset = X]

IOSTRMIN is shown in Figure 11-3 and described in Table 11-5.

Internal. Only to be used through TI provided API.

Figure 11-3. IOSTRMIN Register

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RESERVED

R-X

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RESERVED GRAY_CODE

R-X R/W-3h

Table 11-5. IOSTRMIN Register Field Descriptions

Bit Field Type Reset Description

31-3 RESERVED R X

Internal. Only to be used through TI provided API.

2-0 GRAY_CODE R/W 3h

Internal. Only to be used through TI provided API.

877

SWCU117A–February 2015–Revised March 2015 I/O Control

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