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10.2.1.21 AESDATALEN1 Register (Offset = 558h) [reset = X]
AESDATALEN1 is shown in Figure 10-23 and described in Table 10-31.
Crypto Data Length MSW
Figure 10-23. AESDATALEN1 Register
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
RESERVED LEN_MSW
W-X W-X
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
LEN_MSW
W-X
Table 10-31. AESDATALEN1 Register Field Descriptions
Bit Field Type Reset Description
31-29 RESERVED W X
Software should not rely on the value of a reserved. Writing any
other value than the reset value may result in undefined behavior.
28-0 LEN_MSW W X
Bits [60:32] of the combined data length. Bits [60:0] of the crypto
length registers AESDATALEN1 and AESDATALEN0 store the
cryptographic data length in bytes for all modes. Once processing
with this context is started, this length decrements to zero. Data
lengths up to (2^61 - 1) bytes are allowed. For GCM, any value up to
2^36 - 32 bytes can be used. This is because a 32-bit counter mode
is used; the maximum number of 128-bit blocks is 2^32 - 2, resulting
in a maximum number of bytes of 2^36 - 32. Writing to this register
triggers the engine to start using this context. This is valid for all
modes except GCM and CCM. Note: For the combined modes
(GCM and CCM), this length does not include the authentication only
data; the authentication length is specified in the
AESAUTHLEN.LEN. All modes must have a length > 0. For the
combined modes, it is allowed to have one of the lengths equal to
zero. For the basic encryption modes (ECB/CBC/CTR) it is allowed
to program zero to the length field; in that case the length is
assumed infinite. All data must be byte (8-bit) aligned for stream
cipher modes; bit aligned data streams are not supported by the
Crypto peripheral. For block cipher modes, the data length must be
programmed in multiples of the block cipher size, 16 bytes.
847
SWCU117A–February 2015–Revised March 2015
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